NAND Flash Memory with Multiple Page Sizes for High-Performance Storage Devices

Jin Young Kim, Sang Hoon Park, Hyeokjun Seo, Ki Whan Song, Sungroh Yoon, Eui Young Chung

Research output: Contribution to journalArticlepeer-review

11 Citations (Scopus)


In recent years, the demand for NAND flash-based storage devices has rapidly increased because of the popularization of various portable devices. NAND flash memory (NFM) offers many advantages, such as nonvolatility, high performance, the small form factor, and low-power consumption, while achieving high chip integration with a specialized architecture for bulk data access. A unit of NFM's read and program operations, the page, has continuously grown. Although increasing page size reduces costs, it adversely affects performance because of the resultant side effects, such as fragmentation and wasted space, caused by the incongruity of data and page sizes. To address this issue, we propose a multiple-page-size NFM architecture and its management. Our method dramatically improves write performance through adopting multiple page sizes without requiring additional area overhead or manufacturing processes. Based on the experimental results, the proposed NFM improves write latency and NFM lifetime by up to 65% and 62%, respectively, compared with the single-page-size NFM.

Original languageEnglish
Article number7066966
Pages (from-to)764-768
Number of pages5
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number2
Publication statusPublished - 2016 Feb

Bibliographical note

Publisher Copyright:
© 1993-2012 IEEE.

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering


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