Nanocrystal memory cell using high-density Si 0.73Ge 0.27 quantum dot array

Dong Hyuk Chae, Dae Hwan Kim, Yongjae Lee, Chang Hyun Kwak, Jong Duk Lee, Byung Gook Park, Tae Sik Yoon, Jang Yeon Kwon, Ki Bum Kim, Kyoung Ryol Kim, Noejung Park, Hyunsik Yoon, Seok Jae Jeong

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

Principles of operation of a single electron memory cell using nanocrystals incorporated in the gate oxide of a MOSFET were investigated and possibilities for the application to a multi-level flash memory cell with high reliability and low power using the Coulomb blockade effect at room temperature were shown. Single electron memory cells using Si 0.73Ge 0.27 nanocrystal array as a storage electrode were fabricated and characterized. The nanocrystals were deposited as amorphous islands in LPCVD and were crystallized by rapid thermal annealing. The size of deposited nanocrystals was observed to be about 5 nm and the density was higher than 10 12 cm -2. From the result of the characterization of the fabricated devices, the threshold voltage shift corresponding to charging of single electron per nanocrystal was observed to be greater than 2 V, from which the density of the nanocrystal array was estimated to be about 2.6×10 12 cm -2. Programming characteristics of the device with respect to time showed a multi-step tunneling phenomenon, which seems to be due to an interaction among closely-spaced quantum dots.

Original languageEnglish
Pages (from-to)S995-S998
JournalJournal of the Korean Physical Society
Volume35
Issue numberSUPPL. 4
Publication statusPublished - 1999 Dec 1

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nanocrystals
quantum dots
cells
electrons
programming
threshold voltage
charging
flash
field effect transistors
annealing
electrodes
oxides
shift
room temperature
interactions

All Science Journal Classification (ASJC) codes

  • Physics and Astronomy(all)

Cite this

Chae, D. H., Kim, D. H., Lee, Y., Kwak, C. H., Lee, J. D., Park, B. G., ... Jeong, S. J. (1999). Nanocrystal memory cell using high-density Si 0.73Ge 0.27 quantum dot array. Journal of the Korean Physical Society, 35(SUPPL. 4), S995-S998.
Chae, Dong Hyuk ; Kim, Dae Hwan ; Lee, Yongjae ; Kwak, Chang Hyun ; Lee, Jong Duk ; Park, Byung Gook ; Yoon, Tae Sik ; Kwon, Jang Yeon ; Kim, Ki Bum ; Kim, Kyoung Ryol ; Park, Noejung ; Yoon, Hyunsik ; Jeong, Seok Jae. / Nanocrystal memory cell using high-density Si 0.73Ge 0.27 quantum dot array. In: Journal of the Korean Physical Society. 1999 ; Vol. 35, No. SUPPL. 4. pp. S995-S998.
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abstract = "Principles of operation of a single electron memory cell using nanocrystals incorporated in the gate oxide of a MOSFET were investigated and possibilities for the application to a multi-level flash memory cell with high reliability and low power using the Coulomb blockade effect at room temperature were shown. Single electron memory cells using Si 0.73Ge 0.27 nanocrystal array as a storage electrode were fabricated and characterized. The nanocrystals were deposited as amorphous islands in LPCVD and were crystallized by rapid thermal annealing. The size of deposited nanocrystals was observed to be about 5 nm and the density was higher than 10 12 cm -2. From the result of the characterization of the fabricated devices, the threshold voltage shift corresponding to charging of single electron per nanocrystal was observed to be greater than 2 V, from which the density of the nanocrystal array was estimated to be about 2.6×10 12 cm -2. Programming characteristics of the device with respect to time showed a multi-step tunneling phenomenon, which seems to be due to an interaction among closely-spaced quantum dots.",
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Chae, DH, Kim, DH, Lee, Y, Kwak, CH, Lee, JD, Park, BG, Yoon, TS, Kwon, JY, Kim, KB, Kim, KR, Park, N, Yoon, H & Jeong, SJ 1999, 'Nanocrystal memory cell using high-density Si 0.73Ge 0.27 quantum dot array', Journal of the Korean Physical Society, vol. 35, no. SUPPL. 4, pp. S995-S998.

Nanocrystal memory cell using high-density Si 0.73Ge 0.27 quantum dot array. / Chae, Dong Hyuk; Kim, Dae Hwan; Lee, Yongjae; Kwak, Chang Hyun; Lee, Jong Duk; Park, Byung Gook; Yoon, Tae Sik; Kwon, Jang Yeon; Kim, Ki Bum; Kim, Kyoung Ryol; Park, Noejung; Yoon, Hyunsik; Jeong, Seok Jae.

In: Journal of the Korean Physical Society, Vol. 35, No. SUPPL. 4, 01.12.1999, p. S995-S998.

Research output: Contribution to journalArticle

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T1 - Nanocrystal memory cell using high-density Si 0.73Ge 0.27 quantum dot array

AU - Chae, Dong Hyuk

AU - Kim, Dae Hwan

AU - Lee, Yongjae

AU - Kwak, Chang Hyun

AU - Lee, Jong Duk

AU - Park, Byung Gook

AU - Yoon, Tae Sik

AU - Kwon, Jang Yeon

AU - Kim, Ki Bum

AU - Kim, Kyoung Ryol

AU - Park, Noejung

AU - Yoon, Hyunsik

AU - Jeong, Seok Jae

PY - 1999/12/1

Y1 - 1999/12/1

N2 - Principles of operation of a single electron memory cell using nanocrystals incorporated in the gate oxide of a MOSFET were investigated and possibilities for the application to a multi-level flash memory cell with high reliability and low power using the Coulomb blockade effect at room temperature were shown. Single electron memory cells using Si 0.73Ge 0.27 nanocrystal array as a storage electrode were fabricated and characterized. The nanocrystals were deposited as amorphous islands in LPCVD and were crystallized by rapid thermal annealing. The size of deposited nanocrystals was observed to be about 5 nm and the density was higher than 10 12 cm -2. From the result of the characterization of the fabricated devices, the threshold voltage shift corresponding to charging of single electron per nanocrystal was observed to be greater than 2 V, from which the density of the nanocrystal array was estimated to be about 2.6×10 12 cm -2. Programming characteristics of the device with respect to time showed a multi-step tunneling phenomenon, which seems to be due to an interaction among closely-spaced quantum dots.

AB - Principles of operation of a single electron memory cell using nanocrystals incorporated in the gate oxide of a MOSFET were investigated and possibilities for the application to a multi-level flash memory cell with high reliability and low power using the Coulomb blockade effect at room temperature were shown. Single electron memory cells using Si 0.73Ge 0.27 nanocrystal array as a storage electrode were fabricated and characterized. The nanocrystals were deposited as amorphous islands in LPCVD and were crystallized by rapid thermal annealing. The size of deposited nanocrystals was observed to be about 5 nm and the density was higher than 10 12 cm -2. From the result of the characterization of the fabricated devices, the threshold voltage shift corresponding to charging of single electron per nanocrystal was observed to be greater than 2 V, from which the density of the nanocrystal array was estimated to be about 2.6×10 12 cm -2. Programming characteristics of the device with respect to time showed a multi-step tunneling phenomenon, which seems to be due to an interaction among closely-spaced quantum dots.

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Chae DH, Kim DH, Lee Y, Kwak CH, Lee JD, Park BG et al. Nanocrystal memory cell using high-density Si 0.73Ge 0.27 quantum dot array. Journal of the Korean Physical Society. 1999 Dec 1;35(SUPPL. 4):S995-S998.