Near optimal repair rate built-in redundancy analysis with very small hardware overhead

Woosung Lee, Keewon Cho, Jooyoung Kim, Sungho Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

As the memory density and capacity grows, it is more likely that the number of defects increases. For this reason, in order to improve memory yield, repair analysis is widely used. Built-in redundancy analysis (BIRA) is regarded as one of the solutions to improve memory yield. However, the previous BIRA approaches require large hardware overhead to achieve an optimal repair rate. This is the main obstacle to use BIRA practically. Therefore, a new BIRA is proposed to reduce the hardware overhead significantly using spare allocation probability according to the number of faults on a sparse faulty line. The experimental results show that the hardware overhead of the proposed approach can be considerably reduced with slight loss of repair rate. Therefore, it can be used as a practical solution for BIRA.

Original languageEnglish
Title of host publicationProceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015
PublisherIEEE Computer Society
Pages435-439
Number of pages5
ISBN (Electronic)9781479975815
DOIs
Publication statusPublished - 2015 Apr 13
Event16th International Symposium on Quality Electronic Design, ISQED 2015 - Santa Clara, United States
Duration: 2015 Mar 22015 Mar 4

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2015-April
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Other

Other16th International Symposium on Quality Electronic Design, ISQED 2015
CountryUnited States
CitySanta Clara
Period15/3/215/3/4

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

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  • Cite this

    Lee, W., Cho, K., Kim, J., & Kang, S. (2015). Near optimal repair rate built-in redundancy analysis with very small hardware overhead. In Proceedings of the 16th International Symposium on Quality Electronic Design, ISQED 2015 (pp. 435-439). [7085465] (Proceedings - International Symposium on Quality Electronic Design, ISQED; Vol. 2015-April). IEEE Computer Society. https://doi.org/10.1109/ISQED.2015.7085465