New scan power reduction scheme using transition freezing for pseudo-random logic BIST

Youbean Kim, Kicheol Kim, Incheol Kim, Hyunwook Son, Sungho Kang

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

This paper presents a new low power BIST TPG scheme for reducing scan transitions. It uses a transition freezing and melting method which is implemented of the transition freezing block and a MUX. When random test patterns are generated from an LFSR, transitions of those patterns satisfy pseudo-random Gaussian distribution. The proposed technique freezes transitions of patterns using a freezing value. Experimental results show that the proposed BIST TPG schemes can reduce average power reduction by about 60% without performance loss and peak power by about 30% in ISCAS'89 benchmark circuits.

Original languageEnglish
Pages (from-to)1185-1188
Number of pages4
JournalIEICE Transactions on Information and Systems
VolumeE91-D
Issue number4
DOIs
Publication statusPublished - 2008 Jan 1

Fingerprint

Built-in self test
Freezing
Gaussian distribution
Melting
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Computer Vision and Pattern Recognition
  • Electrical and Electronic Engineering
  • Artificial Intelligence

Cite this

Kim, Youbean ; Kim, Kicheol ; Kim, Incheol ; Son, Hyunwook ; Kang, Sungho. / New scan power reduction scheme using transition freezing for pseudo-random logic BIST. In: IEICE Transactions on Information and Systems. 2008 ; Vol. E91-D, No. 4. pp. 1185-1188.
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New scan power reduction scheme using transition freezing for pseudo-random logic BIST. / Kim, Youbean; Kim, Kicheol; Kim, Incheol; Son, Hyunwook; Kang, Sungho.

In: IEICE Transactions on Information and Systems, Vol. E91-D, No. 4, 01.01.2008, p. 1185-1188.

Research output: Contribution to journalArticle

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