New scan power reduction scheme using transition freezing for pseudo-random logic BIST

Youbean Kim, Kicheol Kim, Incheol Kim, Hyunwook Son, Sungho Kang

Research output: Contribution to journalArticle

3 Citations (Scopus)


This paper presents a new low power BIST TPG scheme for reducing scan transitions. It uses a transition freezing and melting method which is implemented of the transition freezing block and a MUX. When random test patterns are generated from an LFSR, transitions of those patterns satisfy pseudo-random Gaussian distribution. The proposed technique freezes transitions of patterns using a freezing value. Experimental results show that the proposed BIST TPG schemes can reduce average power reduction by about 60% without performance loss and peak power by about 30% in ISCAS'89 benchmark circuits.

Original languageEnglish
Pages (from-to)1185-1188
Number of pages4
JournalIEICE Transactions on Information and Systems
Issue number4
Publication statusPublished - 2008 Apr


All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Computer Vision and Pattern Recognition
  • Electrical and Electronic Engineering
  • Artificial Intelligence

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