State-of-the-art process technology offers ultra-low power devices operating at ultra-low voltages. However, they show a considerable level of non-linear characteristics. Hence, the accuracy of cell delay and variation modeling for logic cells is expected to be very low with a linear interpolation. In this paper, we propose a compressive sensing based high non-linear cell delay and variation modeling. This paper introduces accuracy optimization methods to fit the delay and variation modeling by pre-processing. Pre-processing is a hybrid approach combining a linear interpolation and compressive sensing for accurate restoration with using less samples. With FinFET cell delay and variation modeling, the experimental results show that the proposed method can obtain a similar or better accuracy with a half of measurement samples than a conventional linear interpolation based modeling.
|Title of host publication||IEEE International Symposium on Circuits and Systems|
|Subtitle of host publication||From Dreams to Innovation, ISCAS 2017 - Conference Proceedings|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Publication status||Published - 2017 Sep 25|
|Event||50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 - Baltimore, United States|
Duration: 2017 May 28 → 2017 May 31
|Name||Proceedings - IEEE International Symposium on Circuits and Systems|
|Other||50th IEEE International Symposium on Circuits and Systems, ISCAS 2017|
|Period||17/5/28 → 17/5/31|
Bibliographical noteFunding Information:
ACKNOWLEDGMENT This research was supported by Basic Science Research Program through the National Research Foundation of Korea(NRF) funded by the Ministry of Education (NRF-2015R1D1A1A01058856) and partially supported by Samsung Research Fund.
© 2017 IEEE.
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering