A novel 2-GHz-range fully differential phase-locked loop (PLL) is designed for clock generation applications. The PLL includes a differentially controlled voltage-controlled oscillator (VCO) with a tuning range of 1.74∼3.40 GHz and a differential charge pump with improved hold characteristics. The PLL is implemented with Vitesse 0.5-μm GaAs MESFET (metal-semiconductor field-effect transistor) process. The experimental results show that the proposed PLL has a lock range of 1.74∼3.40 GHz and a maximum VCO root-mean-square jitter of 9.0 ps (0.031 UI).
|Number of pages||6|
|Journal||Journal of the Korean Physical Society|
|Publication status||Published - 2000 Dec|
All Science Journal Classification (ASJC) codes
- Physics and Astronomy(all)