For the first time, we propose and experimentally demonstrate a novel single-transistor(1T) DRAM: Capacitorless Single-Transistor Charge-Trap DRAM (1T CT DRAM). The memory operation is obtained by engineering the body of the transistor with CTs by creating intentional electron-trapping zones. This memory makes use of charge traps and uses the existence or absence of electrons in its body instead of holes that are conventionally used in 1T DRAMs whose operation depends on floating-body effects. The DRAM operation is experimentally demonstrated.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering