Abstract
We have investigated the characteristics of cell leakage and data retention time when using flowable oxide chemical vapor deposition (CVD) as a shallow trench isolation (STI) process of 1-Gbit DRAM. The trench gap filling capability was increased dramatically by combining high-density plasma (HDP) CVD with flowable oxide CVD. The reduced local stress by flowable oxide in narrow trenches leaded to decrease in junction leakage and gate induced drain leakage (GIDL) current and increase in data retention time of DRAM compared to HDP STI. Therefore, it is concluded that the combination of flowable oxide and HDP oxide is the most promising technology for STI gap filling process of sub-100 nm DRAM technology.
| Original language | English |
|---|---|
| Pages (from-to) | 233-236 |
| Number of pages | 4 |
| Journal | Technical Digest - International Electron Devices Meeting |
| Publication status | Published - 2002 |
| Event | 2002 IEEE International Devices Meeting (IEDM) - San Francisco, CA, United States Duration: 2002 Dec 8 → 2002 Dec 11 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry
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Chung, S. W., Ahn, S. T., Sohn, H. C., Ku, J., Park, S., Song, Y. W., Park, H. S., & Lee, S. D. (2002). Novel shallow trench isolation process using flowable oxide CVD for sub-100 nm DRAM. Technical Digest - International Electron Devices Meeting, 233-236.