On-chip compensation of ring VCO oscillation frequency changes due to supply noise and process variation

Young Seok Park, Woo Young Choi

Research output: Contribution to journalArticle

13 Citations (Scopus)

Abstract

A novel circuit technique that stabilizes the oscillation frequency of a ring-type voltage-controlled oscillator (RVCO) is demonstrated. The technique uses on-chip bias-current and voltage-swing controllers, which compensate RVCO oscillation frequency changes caused by supply noise and process variation. A prototype phase-locked loop (PLL) having the RVCO with the compensation circuit is fabricated with 0.13-μm CMOS technology. At the operating frequency of 4 GHz, the measured PLL rms jitter improves from 20.11 to 5.78 ps with 4-MHz RVCO supply noise. Simulation results show that the oscillation frequency difference between FF and SS corner is reduced from 63% to 6% of the NN corner oscillation frequency.

Original languageEnglish
Article number6140551
Pages (from-to)73-77
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume59
Issue number2
DOIs
Publication statusPublished - 2012 Feb 1

Fingerprint

Variable frequency oscillators
Phase locked loops
Bias currents
Networks (circuits)
Bias voltage
Jitter
Controllers
Compensation and Redress

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

@article{871142785cc24a54bf1e52095c7185d4,
title = "On-chip compensation of ring VCO oscillation frequency changes due to supply noise and process variation",
abstract = "A novel circuit technique that stabilizes the oscillation frequency of a ring-type voltage-controlled oscillator (RVCO) is demonstrated. The technique uses on-chip bias-current and voltage-swing controllers, which compensate RVCO oscillation frequency changes caused by supply noise and process variation. A prototype phase-locked loop (PLL) having the RVCO with the compensation circuit is fabricated with 0.13-μm CMOS technology. At the operating frequency of 4 GHz, the measured PLL rms jitter improves from 20.11 to 5.78 ps with 4-MHz RVCO supply noise. Simulation results show that the oscillation frequency difference between FF and SS corner is reduced from 63{\%} to 6{\%} of the NN corner oscillation frequency.",
author = "Park, {Young Seok} and Choi, {Woo Young}",
year = "2012",
month = "2",
day = "1",
doi = "10.1109/TCSII.2011.2180092",
language = "English",
volume = "59",
pages = "73--77",
journal = "IEEE Transactions on Circuits and Systems II: Express Briefs",
issn = "1549-7747",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "2",

}

On-chip compensation of ring VCO oscillation frequency changes due to supply noise and process variation. / Park, Young Seok; Choi, Woo Young.

In: IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 59, No. 2, 6140551, 01.02.2012, p. 73-77.

Research output: Contribution to journalArticle

TY - JOUR

T1 - On-chip compensation of ring VCO oscillation frequency changes due to supply noise and process variation

AU - Park, Young Seok

AU - Choi, Woo Young

PY - 2012/2/1

Y1 - 2012/2/1

N2 - A novel circuit technique that stabilizes the oscillation frequency of a ring-type voltage-controlled oscillator (RVCO) is demonstrated. The technique uses on-chip bias-current and voltage-swing controllers, which compensate RVCO oscillation frequency changes caused by supply noise and process variation. A prototype phase-locked loop (PLL) having the RVCO with the compensation circuit is fabricated with 0.13-μm CMOS technology. At the operating frequency of 4 GHz, the measured PLL rms jitter improves from 20.11 to 5.78 ps with 4-MHz RVCO supply noise. Simulation results show that the oscillation frequency difference between FF and SS corner is reduced from 63% to 6% of the NN corner oscillation frequency.

AB - A novel circuit technique that stabilizes the oscillation frequency of a ring-type voltage-controlled oscillator (RVCO) is demonstrated. The technique uses on-chip bias-current and voltage-swing controllers, which compensate RVCO oscillation frequency changes caused by supply noise and process variation. A prototype phase-locked loop (PLL) having the RVCO with the compensation circuit is fabricated with 0.13-μm CMOS technology. At the operating frequency of 4 GHz, the measured PLL rms jitter improves from 20.11 to 5.78 ps with 4-MHz RVCO supply noise. Simulation results show that the oscillation frequency difference between FF and SS corner is reduced from 63% to 6% of the NN corner oscillation frequency.

UR - http://www.scopus.com/inward/record.url?scp=84863275826&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84863275826&partnerID=8YFLogxK

U2 - 10.1109/TCSII.2011.2180092

DO - 10.1109/TCSII.2011.2180092

M3 - Article

AN - SCOPUS:84863275826

VL - 59

SP - 73

EP - 77

JO - IEEE Transactions on Circuits and Systems II: Express Briefs

JF - IEEE Transactions on Circuits and Systems II: Express Briefs

SN - 1549-7747

IS - 2

M1 - 6140551

ER -