The instruction cache has been recognized as one of the least hot units in microprocessors, which leaves the instruction cache largely ignored in on-chip thermal management. Consequently, thermal sensors are not allocated near the instruction cache. However, malicious codes can exploit the deficiency in this empirical design and heat up fine-grain localized hotspots in the instruction cache, which might lead to physical damages. In this paper, we show how instruction caches can be thermally attacked by malicious codes and how simple techniques can be utilized to protect instruction caches from the thermal attack.
|Number of pages||7|
|Journal||IEEE Transactions on Dependable and Secure Computing|
|Publication status||Published - 2010|
Bibliographical noteFunding Information:
This work was supported by the Korea Science and Engineering Foundation (KOSEF) grant funded by the Korea government (MEST) (No. R01-2007-000-20750-0). This work was also supported by a Korea University Grant. The authors would like to thank Professor Kevin Skadron for his helpful comments. Finally, they would like to thank the anonymous reviewers for their helpful feedback. Sung Woo Chung is the corresponding author of this paper.
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering