This paper presents a one-sided Schmitt-Trigger-based 9T static random access memory cell with low energy consumption and high read stability, write ability, and hold stability yields in a bit-interleaving structure without write-back scheme. The proposed Schmitt-Trigger-based 9T static random access memory cell obtains a high read stability yield by using a one-sided Schmitt-Trigger inverter with a single bit-line structure. In addition, the write ability yield is improved by applying selective power gating and a Schmitt-Trigger inverter write assist technique that controls the trip voltage of the Schmitt-Trigger inverter. The proposed Schmitt-Trigger-based 9T static random access memory cell has 0.79, 0.77, and 0.79 times the area, and consumes 0.31, 0.68, and 0.90 times the energy of Chang's 10T, the Schmitt-Trigger-based 10T, and MH's 9T static random access memory cells, respectively, based on 22-nm FinFET technology.
|Number of pages||11|
|Journal||IEEE Transactions on Circuits and Systems I: Regular Papers|
|Publication status||Published - 2020 May|
Bibliographical noteFunding Information:
Manuscript received August 22, 2019; revised December 11, 2019, January 3, 2020, and January 5, 2020; accepted January 5, 2020. Date of publication February 26, 2020; date of current version May 1, 2020. This work was supported by the IT Research and Development Program of MOTIE/KEIT under Grant 10052716 and in part by the Design Technology Development of Ultra-Low Voltage Operating Circuit and IP for Smart Sensor SoC. This article was recommended by Associate Editor M. Mozaffari Kermani. (Corresponding author: Seong-Ook Jung.) The authors are with the School of Electrical and Electronic Engineering, Yonsei University, Seoul 03722, South Korea (e-mail: email@example.com).
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All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering