Optimal batch sizing for parallel machines in semiconductor wafer fabrication

Bongju Jeong, Jaehyung Choi, Jinmo Sung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper addresses the problem of determining the batch sizes for parallel machines in semiconductor wafer fabrication which has the characteristics of re-entrant process flows. Due to complexity of re-entrant process flows, semiconductor wafer production system has high variability in arrival patterns and experiences high imbalances among processes, which eventually degrades whole system performances. In this paper, we show that finding optimal batch sizes for key processes can considerably reduce the imbalances among processes and queue lengths between processes. A simple technique for determining the optimal batch sizes for parallel machines with different speeds and variability is developed and applied to solve a case problem. The results are briefly discussed in terms of system parameters involved in manufacturing environment.

Original languageEnglish
Title of host publication40th International Conference on Computers and Industrial Engineering
Subtitle of host publicationSoft Computing Techniques for Advanced Manufacturing and Service Systems, CIE40 2010
DOIs
Publication statusPublished - 2010 Dec 1
Event40th International Conference on Computers and Industrial Engineering, CIE40 2010 - Awaji, Japan
Duration: 2010 Jul 252010 Jul 28

Other

Other40th International Conference on Computers and Industrial Engineering, CIE40 2010
CountryJapan
CityAwaji
Period10/7/2510/7/28

Fingerprint

Semiconductor materials
Fabrication

All Science Journal Classification (ASJC) codes

  • Computational Theory and Mathematics
  • Software

Cite this

Jeong, B., Choi, J., & Sung, J. (2010). Optimal batch sizing for parallel machines in semiconductor wafer fabrication. In 40th International Conference on Computers and Industrial Engineering: Soft Computing Techniques for Advanced Manufacturing and Service Systems, CIE40 2010 [5668414] https://doi.org/10.1109/ICCIE.2010.5668414
Jeong, Bongju ; Choi, Jaehyung ; Sung, Jinmo. / Optimal batch sizing for parallel machines in semiconductor wafer fabrication. 40th International Conference on Computers and Industrial Engineering: Soft Computing Techniques for Advanced Manufacturing and Service Systems, CIE40 2010. 2010.
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Jeong, B, Choi, J & Sung, J 2010, Optimal batch sizing for parallel machines in semiconductor wafer fabrication. in 40th International Conference on Computers and Industrial Engineering: Soft Computing Techniques for Advanced Manufacturing and Service Systems, CIE40 2010., 5668414, 40th International Conference on Computers and Industrial Engineering, CIE40 2010, Awaji, Japan, 10/7/25. https://doi.org/10.1109/ICCIE.2010.5668414

Optimal batch sizing for parallel machines in semiconductor wafer fabrication. / Jeong, Bongju; Choi, Jaehyung; Sung, Jinmo.

40th International Conference on Computers and Industrial Engineering: Soft Computing Techniques for Advanced Manufacturing and Service Systems, CIE40 2010. 2010. 5668414.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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AB - This paper addresses the problem of determining the batch sizes for parallel machines in semiconductor wafer fabrication which has the characteristics of re-entrant process flows. Due to complexity of re-entrant process flows, semiconductor wafer production system has high variability in arrival patterns and experiences high imbalances among processes, which eventually degrades whole system performances. In this paper, we show that finding optimal batch sizes for key processes can considerably reduce the imbalances among processes and queue lengths between processes. A simple technique for determining the optimal batch sizes for parallel machines with different speeds and variability is developed and applied to solve a case problem. The results are briefly discussed in terms of system parameters involved in manufacturing environment.

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Jeong B, Choi J, Sung J. Optimal batch sizing for parallel machines in semiconductor wafer fabrication. In 40th International Conference on Computers and Industrial Engineering: Soft Computing Techniques for Advanced Manufacturing and Service Systems, CIE40 2010. 2010. 5668414 https://doi.org/10.1109/ICCIE.2010.5668414