Optimal timing for skew-tolerant high-speed domino logic

Seong Ook Jung, Ki Wook Kim, Sung Mo Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

When low threshold voltage (Vt) is applied to domino logic to improve the performance, the tradeoff between performance and noise margin is a major design issue. To resolve the tradeoff we propose Skew-Tolerant High-Speed (STHS) domino logic, which incorporates a dual keeper structure and delay logic gates. Detailed timing analysis of STHS domino logic induces optimal timing conditions wherein contention-free skew-tolerant window is maximized. We show that dual keeper structure increases innate noise-tolerance, and clock delay control logic fortifies signal skew-tolerance. Simulation results show that STHS domino logic is more robust to noise and signal skew than High-Speed (HS) domino logic, while presenting better performance and power efficiency.

Original languageEnglish
Title of host publicationProceedings - IEEE Computer Society Annual Symposium on VLSI
Subtitle of host publicationNew Paradigms for VLSI Systems Design, ISVLSI 2002
EditorsAsim Smailagic, Robert Brodersen
PublisherIEEE Computer Society
Pages41-46
Number of pages6
ISBN (Electronic)0769514863
DOIs
Publication statusPublished - 2002
EventIEEE Computer Society Annual Symposium on VLSI, ISVLSI 2002 - Pittsburgh, United States
Duration: 2002 Apr 252002 Apr 26

Publication series

NameProceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Volume2002-January
ISSN (Print)2159-3469
ISSN (Electronic)2159-3477

Other

OtherIEEE Computer Society Annual Symposium on VLSI, ISVLSI 2002
CountryUnited States
CityPittsburgh
Period02/4/2502/4/26

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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  • Cite this

    Jung, S. O., Kim, K. W., & Kang, S. M. (2002). Optimal timing for skew-tolerant high-speed domino logic. In A. Smailagic, & R. Brodersen (Eds.), Proceedings - IEEE Computer Society Annual Symposium on VLSI: New Paradigms for VLSI Systems Design, ISVLSI 2002 (pp. 41-46). [1016871] (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; Vol. 2002-January). IEEE Computer Society. https://doi.org/10.1109/ISVLSI.2002.1016871