44-layers PCB (Printed Circuit Board) for semiconductor test has been analyzed and optimized to improve the transmission performance. By dividing the PCB to subsections and analyzing each section, stub resonance reported in  brings the degeneration of transmission performance. To resolve this problem, the blind via can be used, but this technique is not recommended due to high cost and additional process. Hence, this paper proposes that the size of a clearance pad can be optimized to shift the resonance frequency to a higher frequency instead of adopting a blind via. When the size of the clearance pad is optimized, the S21 is improved to about -7 dB in several cases. For the analysis of the entire structure, the PCB is divided into several portions and then, the performance of each portion is analyzed by the 3D full EM simulation. These results are synthesized by circuit simulation. This methodology is verified by comparing between simulation results and measurement results.