This thesis deals with the method to improve the gate driver stability of large sized IGZO TFT panel. The proposed Gate driver circuit was designed for 26-inch HD LCD Panel and the circuit has been designed considering the electrical characteristic of instability under the bias stress and temperature This circuit consists of twenty TFT using two clock signals such as CK1,CK2 (Von) and 1 power signals such as VSS (Voff), and new circuit with double inverter suppress the ripple occurrence for every time except actuating time that the signal of the gate line is revealed. By applying the proposed new circuit, the H-SPICE simulation was performed. TFT in integrated circuit can be stable in the low frequency drive (48 Hz) althought δVth was 29 V and It could be applicable to the threshold frequency of 86 Hz in the high frequency operation without a problem.
|Number of pages||4|
|Journal||Digest of Technical Papers - SID International Symposium|
|Publication status||Published - 2011 Jun|
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