Scan chain architecture is a common and major DFT for SoCs. Scan chains must be flawless for reliable SoC test. If there is a fault in a scan chain, eliminating the fault and its cause is important for high yield of SoC. In this paper, a new scan chain diagnosis method, "p-backtracking", is proposed. This method uses only software to backtrack the logic circuit and calculates the probability of fault in scan chain. The experimental results using ISC AS'89 benchmark circuits show that p- backtracking can find single fault location with higher diagnosis accuracy and smaller diagnosis resolution compared to the conventional diagnosis methods.
|Title of host publication||ISOCC 2016 - International SoC Design Conference|
|Subtitle of host publication||Smart SoC for Intelligent Things|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||2|
|Publication status||Published - 2016 Dec 27|
|Event||13th International SoC Design Conference, ISOCC 2016 - Jeju, Korea, Republic of|
Duration: 2016 Oct 23 → 2016 Oct 26
|Name||ISOCC 2016 - International SoC Design Conference: Smart SoC for Intelligent Things|
|Other||13th International SoC Design Conference, ISOCC 2016|
|Country/Territory||Korea, Republic of|
|Period||16/10/23 → 16/10/26|
Bibliographical noteFunding Information:
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea govemment(MSIP) (No. 2015R1A2A1A13001751).
© 2016 IEEE.
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering