Parallel transpose of matrix multiplication based on the tiling algorithms

Minwoo Kim, Yong J. Jang, Won Woo Ro

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper introduces a useful technique which can be used in a parallel matrix multiplication with the tiling method. Firstly, we exploit the effect of the matrix transpose for the tiling algorithm compared to the standard tiling algorithm. The experimental results show that the transpose tiling algorithm is more efficient than the standard tiling algorithm in most usable tile sizes. Moreover, we propose a parallel transpose tiling algorithm which is further developed from transpose tiling algorithm. Parallel transpose tiling algorithm reduces the overhead of transpose operation by distributing the matrix over multiple threads. As a result, the parallel transpose tiling algorithm is up to 4.76% and 6.61% faster than the original transpose tiling algorithm on Core2 9400 and Phenom 9550 processors, respectively.

Original languageEnglish
Title of host publication54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011
DOIs
Publication statusPublished - 2011 Oct 13
Event54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011 - Seoul, Korea, Republic of
Duration: 2011 Aug 72011 Aug 10

Other

Other54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011
CountryKorea, Republic of
CitySeoul
Period11/8/711/8/10

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Tile

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Kim, M., Jang, Y. J., & Ro, W. W. (2011). Parallel transpose of matrix multiplication based on the tiling algorithms. In 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011 [6026311] https://doi.org/10.1109/MWSCAS.2011.6026311
Kim, Minwoo ; Jang, Yong J. ; Ro, Won Woo. / Parallel transpose of matrix multiplication based on the tiling algorithms. 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011. 2011.
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title = "Parallel transpose of matrix multiplication based on the tiling algorithms",
abstract = "This paper introduces a useful technique which can be used in a parallel matrix multiplication with the tiling method. Firstly, we exploit the effect of the matrix transpose for the tiling algorithm compared to the standard tiling algorithm. The experimental results show that the transpose tiling algorithm is more efficient than the standard tiling algorithm in most usable tile sizes. Moreover, we propose a parallel transpose tiling algorithm which is further developed from transpose tiling algorithm. Parallel transpose tiling algorithm reduces the overhead of transpose operation by distributing the matrix over multiple threads. As a result, the parallel transpose tiling algorithm is up to 4.76{\%} and 6.61{\%} faster than the original transpose tiling algorithm on Core2 9400 and Phenom 9550 processors, respectively.",
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Kim, M, Jang, YJ & Ro, WW 2011, Parallel transpose of matrix multiplication based on the tiling algorithms. in 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011., 6026311, 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011, Seoul, Korea, Republic of, 11/8/7. https://doi.org/10.1109/MWSCAS.2011.6026311

Parallel transpose of matrix multiplication based on the tiling algorithms. / Kim, Minwoo; Jang, Yong J.; Ro, Won Woo.

54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011. 2011. 6026311.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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AB - This paper introduces a useful technique which can be used in a parallel matrix multiplication with the tiling method. Firstly, we exploit the effect of the matrix transpose for the tiling algorithm compared to the standard tiling algorithm. The experimental results show that the transpose tiling algorithm is more efficient than the standard tiling algorithm in most usable tile sizes. Moreover, we propose a parallel transpose tiling algorithm which is further developed from transpose tiling algorithm. Parallel transpose tiling algorithm reduces the overhead of transpose operation by distributing the matrix over multiple threads. As a result, the parallel transpose tiling algorithm is up to 4.76% and 6.61% faster than the original transpose tiling algorithm on Core2 9400 and Phenom 9550 processors, respectively.

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Kim M, Jang YJ, Ro WW. Parallel transpose of matrix multiplication based on the tiling algorithms. In 54th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2011. 2011. 6026311 https://doi.org/10.1109/MWSCAS.2011.6026311