A fast irregular repeat accumulator (IRA) encoder that reduces the encoder latency for generating parity bits is proposed. The transformation of the parity check matrix into the blockwise form and the usage of the partial parallel process bring a reduction of the number of system clocks for the IRA codes encoding.
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Acknowledgements We would like to thank the Primate Research Facilities of the National Institute of Immunology, New Delhi, the Indian Institute of Science, Bangalore and Dr Lalji Singh of the Centre for Cellular and Molecular Biology, Hyderabad for providing the monkey samples, the Drosophila Stock Centre, Dept. of Studies in Zoology, Manasagangotri, Mysore for providing the different fly strains. Ms Arjumand Ghazi and Mr Yograj Gowda are thanked for help in procuring the fly strains. We would also like to thank Ms M. Uma and Ms R. Jaya for help with the Genescan analysis and Tessi Sherrin and Charu Gandhi for help in DNA extraction. This work was supported by the Department of Biotechnology, Government of India, and the Council of Scientific and Industrial Research, India.
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering