Partial parallel encoder for IRA codes

S. O. Hwang; S. Myung; H. Lee; S. I. Park; J. Y. Lee

doi:10.1049/el.2010.2896

Partial parallel encoder for IRA codes

S. O. Hwang, S. Myung, H. Lee, S. I. Park, J. Y. Lee

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

A fast irregular repeat accumulator (IRA) encoder that reduces the encoder latency for generating parity bits is proposed. The transformation of the parity check matrix into the blockwise form and the usage of the partial parallel process bring a reduction of the number of system clocks for the IRA codes encoding.

Original language	English
Pages (from-to)	135-137
Number of pages	3
Journal	Electronics Letters
Volume	46
Issue number	2
DOIs	https://doi.org/10.1049/el.2010.2896
Publication status	Published - 2010

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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10.1049/el.2010.2896

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abstract = "A fast irregular repeat accumulator (IRA) encoder that reduces the encoder latency for generating parity bits is proposed. The transformation of the parity check matrix into the blockwise form and the usage of the partial parallel process bring a reduction of the number of system clocks for the IRA codes encoding.",

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AU - Myung, S.

AU - Lee, H.

AU - Park, S. I.

AU - Lee, J. Y.

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SN - 0013-5194

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Partial parallel encoder for IRA codes

Abstract

All Science Journal Classification (ASJC) codes

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