Pentacene-based low-leakage memory transistor with dielectric/electrolytic/ dielectric polymer layers

Wonjun Choi, Seok Hwan Noh, D. K. Hwang, Jeong M. Choi, Sungjin Jang, Eugene Kim, Seongil Im

Research output: Contribution to journalArticle

23 Citations (Scopus)

Abstract

We report on the pentacene memory thin-film transistors (TFTs) with a poly-4-vinylphenol (PVP)/poly(vinylidene fluoride/trifluoroethylene) [P(VDF/TrFE)]/PVP triple-layer gate insulator. The top PVP dielectric in the triple layer was intended to provide a smooth hydrophobic surface to ensure good crystalline growth of pentacene channel, while the bottom PVP was for leakage protection. The middle P(VDF/TrFE) layer, known as ferroelectric material, revealed an electrolytic or ion movement signature rather than ferroelectric in our sandwich form of organic insulator. Our TFTs showed remarkably reduced leakage current, good memory window (large threshold voltage shift under slow gate-bias swing), and good field-effect mobility (0.2 cm2 V s). Retention time for the electrolytic memory effects was measured to be more than 104 s under a constant-read condition.

Original languageEnglish
Pages (from-to)H47-H50
JournalElectrochemical and Solid-State Letters
Volume11
Issue number3
DOIs
Publication statusPublished - 2008

All Science Journal Classification (ASJC) codes

  • Chemical Engineering(all)
  • Materials Science(all)
  • Physical and Theoretical Chemistry
  • Electrochemistry
  • Electrical and Electronic Engineering

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