Performance of an input-queued ATM switch with even/odd switching planes

J. W. Son, H. T. Lee, Y. Y. Oh, J. Y. Lee, S. B. Lee

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

A switch architecture is proposed for alleviating the HOL blocking by employing even/odd dual FIFO queues at each input and even/odd dual switching planes dedicated to each even/odd queue. Under random traffic, it gives 76.4% throughput without output expansion and 100% with output expansion r = 2, with the same amount of crosspoints as for the ordinary output expansion scheme.

Original languageEnglish
Pages (from-to)1192-1193
Number of pages2
JournalElectronics Letters
Volume33
Issue number14
DOIs
Publication statusPublished - 1997 Jul 3

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All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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