Performance simulations and verification for power/ground planes connected with ground area-fills on multi-layer PCBs

Seung Joo Lee, Hae Jin Hwang, Jun-Lee, Jong Humn Baek, Jong Gwan Yook

Research output: Contribution to journalConference article

1 Citation (Scopus)

Abstract

This paper deals with the effect of ground area-fill which affects the impedance of power distribution network (PDN) in the general desktop-PC motherboard. The outer area-fills connected to inner power/ground planes are modeled in equivalent cell-mesh structure. The unit cell is composed of circuit elements, encompassing the effect of DC and frequency dependent loss. Vector network analyzer (VNA) is employed for measurement and excellent agreement between the proposed model and simulated result has been obtained. Furthermore, the performance simulation for various arrangements of vias and area-fill is performed based on modeling method presented before. The vias connected with area-fill assess the impedance behavior of power/ground planes. According to the widely known strategy of placement of decoupling capacitor, several simulations are performed. All distributed vias at the area-fill have the same results of distributing all vias at the edge of area-fill at the view of impedance. This results support that the vias placed at the edge is more effective than the center ones in case that the noise source placed out of area-fill, this results have the same as this paper expected by performance simulation.

Original languageEnglish
Pages (from-to)722-726
Number of pages5
JournalProceedings - Electronic Components and Technology Conference
Volume1
Publication statusPublished - 2005 Sep 19
Event55th Electronic Components and Technology Conference, ECTC - Lake Buena Vista, FL, United States
Duration: 2005 May 312005 Jun 4

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Electric network analyzers
Polychlorinated Biphenyls
Polychlorinated biphenyls
Electric power distribution
Capacitors
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

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title = "Performance simulations and verification for power/ground planes connected with ground area-fills on multi-layer PCBs",
abstract = "This paper deals with the effect of ground area-fill which affects the impedance of power distribution network (PDN) in the general desktop-PC motherboard. The outer area-fills connected to inner power/ground planes are modeled in equivalent cell-mesh structure. The unit cell is composed of circuit elements, encompassing the effect of DC and frequency dependent loss. Vector network analyzer (VNA) is employed for measurement and excellent agreement between the proposed model and simulated result has been obtained. Furthermore, the performance simulation for various arrangements of vias and area-fill is performed based on modeling method presented before. The vias connected with area-fill assess the impedance behavior of power/ground planes. According to the widely known strategy of placement of decoupling capacitor, several simulations are performed. All distributed vias at the area-fill have the same results of distributing all vias at the edge of area-fill at the view of impedance. This results support that the vias placed at the edge is more effective than the center ones in case that the noise source placed out of area-fill, this results have the same as this paper expected by performance simulation.",
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Performance simulations and verification for power/ground planes connected with ground area-fills on multi-layer PCBs. / Lee, Seung Joo; Hwang, Hae Jin; Jun-Lee; Baek, Jong Humn; Yook, Jong Gwan.

In: Proceedings - Electronic Components and Technology Conference, Vol. 1, 19.09.2005, p. 722-726.

Research output: Contribution to journalConference article

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AU - Baek, Jong Humn

AU - Yook, Jong Gwan

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N2 - This paper deals with the effect of ground area-fill which affects the impedance of power distribution network (PDN) in the general desktop-PC motherboard. The outer area-fills connected to inner power/ground planes are modeled in equivalent cell-mesh structure. The unit cell is composed of circuit elements, encompassing the effect of DC and frequency dependent loss. Vector network analyzer (VNA) is employed for measurement and excellent agreement between the proposed model and simulated result has been obtained. Furthermore, the performance simulation for various arrangements of vias and area-fill is performed based on modeling method presented before. The vias connected with area-fill assess the impedance behavior of power/ground planes. According to the widely known strategy of placement of decoupling capacitor, several simulations are performed. All distributed vias at the area-fill have the same results of distributing all vias at the edge of area-fill at the view of impedance. This results support that the vias placed at the edge is more effective than the center ones in case that the noise source placed out of area-fill, this results have the same as this paper expected by performance simulation.

AB - This paper deals with the effect of ground area-fill which affects the impedance of power distribution network (PDN) in the general desktop-PC motherboard. The outer area-fills connected to inner power/ground planes are modeled in equivalent cell-mesh structure. The unit cell is composed of circuit elements, encompassing the effect of DC and frequency dependent loss. Vector network analyzer (VNA) is employed for measurement and excellent agreement between the proposed model and simulated result has been obtained. Furthermore, the performance simulation for various arrangements of vias and area-fill is performed based on modeling method presented before. The vias connected with area-fill assess the impedance behavior of power/ground planes. According to the widely known strategy of placement of decoupling capacitor, several simulations are performed. All distributed vias at the area-fill have the same results of distributing all vias at the edge of area-fill at the view of impedance. This results support that the vias placed at the edge is more effective than the center ones in case that the noise source placed out of area-fill, this results have the same as this paper expected by performance simulation.

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