Additional gating elements are inserted at the outputs of scan flip-flop to freeze unnecessary transitions from scan flip-flops to combinational logic such that the hot temperature is avoided during scan shift. This paper presents a new physical-aware gating element insertion method performed after initial cell placement while satisfying timing and placement density constraints, thus it avoids hotspots during scan shift operation.
|Journal||ieice electronics express|
|Publication status||Published - 2017 Mar 21|
Bibliographical noteFunding Information:
This research was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education (NRF-2015R1D1A1A01058856) and partially supported by Samsung Research Fund.
© IEICE 2017.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering