PIM architecture exploration for HMC

Sangwoo Han, Hyeokjun Seo, Byoungjin Kim, Eui Young Chung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Modern processor and memory have significant performance gap that incurs memory-wall phenomenon causing overall system performance degradation. Recently, PIM came out as one of solutions to overcome memory-wall phenomenon as well as increasing system performance. This paper studies how to implement functions within PIM logic for some broadly used applications. Our experiments are based on gem5 simulator. The experimental results show that some of functions are more efficient with PIM and their efficiency depends on the data size.

Original languageEnglish
Title of host publication2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages635-636
Number of pages2
ISBN (Electronic)9781509015702
DOIs
Publication statusPublished - 2017 Jan 3
Event2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 - Jeju, Korea, Republic of
Duration: 2016 Oct 252016 Oct 28

Other

Other2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016
CountryKorea, Republic of
CityJeju
Period16/10/2516/10/28

Fingerprint

Data storage equipment
Simulators
Degradation
Experiments

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Signal Processing

Cite this

Han, S., Seo, H., Kim, B., & Chung, E. Y. (2017). PIM architecture exploration for HMC. In 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016 (pp. 635-636). [7804052] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APCCAS.2016.7804052
Han, Sangwoo ; Seo, Hyeokjun ; Kim, Byoungjin ; Chung, Eui Young. / PIM architecture exploration for HMC. 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., 2017. pp. 635-636
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Han, S, Seo, H, Kim, B & Chung, EY 2017, PIM architecture exploration for HMC. in 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016., 7804052, Institute of Electrical and Electronics Engineers Inc., pp. 635-636, 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, Jeju, Korea, Republic of, 16/10/25. https://doi.org/10.1109/APCCAS.2016.7804052

PIM architecture exploration for HMC. / Han, Sangwoo; Seo, Hyeokjun; Kim, Byoungjin; Chung, Eui Young.

2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc., 2017. p. 635-636 7804052.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Han S, Seo H, Kim B, Chung EY. PIM architecture exploration for HMC. In 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016. Institute of Electrical and Electronics Engineers Inc. 2017. p. 635-636. 7804052 https://doi.org/10.1109/APCCAS.2016.7804052