Pipelined intra prediction using shuffled encoding order for H.264/AVC

Wonjae Lee, Seongjoo Lee, Jaeseok Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)

Abstract

In this paper, we propose a pipelined intra prediction using shuffled encoding order for H.264/AVC. Due to a dependency problem of 4×4 intra prediction mode, a new 4×4 block cannot be predicted before reconstruction of a previous 4×4 block. To minimize this latency, we shuffle the encoding order of 4×4 intra prediction while maintaining the consistency with the standard. To further reduce the processing time, two prediction modes are not used in some blocks. With the proposed method, we can implement the intra prediction block as a pipelined architecture. The processing time can be reduced by maximum 40%, because the latency caused by reconstruction of the previous 4×4 block was hidden. It was implemented into the hardware with some parallel processing architecture. The required cycles were 470 cycles.

Original languageEnglish
Title of host publication2006 IEEE Region 10 Conference, TENCON 2006
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)1424405491, 9781424405497
DOIs
Publication statusPublished - 2006 Jan 1
Event2006 IEEE Region 10 Conference, TENCON 2006 - Hong Kong, China
Duration: 2006 Nov 142006 Nov 17

Publication series

NameIEEE Region 10 Annual International Conference, Proceedings/TENCON
ISSN (Print)2159-3442
ISSN (Electronic)2159-3450

Other

Other2006 IEEE Region 10 Conference, TENCON 2006
CountryChina
CityHong Kong
Period06/11/1406/11/17

Fingerprint

Processing
Hardware

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Electrical and Electronic Engineering

Cite this

Lee, W., Lee, S., & Kim, J. (2006). Pipelined intra prediction using shuffled encoding order for H.264/AVC. In 2006 IEEE Region 10 Conference, TENCON 2006 [4142560] (IEEE Region 10 Annual International Conference, Proceedings/TENCON). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/TENCON.2006.343970
Lee, Wonjae ; Lee, Seongjoo ; Kim, Jaeseok. / Pipelined intra prediction using shuffled encoding order for H.264/AVC. 2006 IEEE Region 10 Conference, TENCON 2006. Institute of Electrical and Electronics Engineers Inc., 2006. (IEEE Region 10 Annual International Conference, Proceedings/TENCON).
@inproceedings{fc37f28583e54cacb43705f4b3be494b,
title = "Pipelined intra prediction using shuffled encoding order for H.264/AVC",
abstract = "In this paper, we propose a pipelined intra prediction using shuffled encoding order for H.264/AVC. Due to a dependency problem of 4×4 intra prediction mode, a new 4×4 block cannot be predicted before reconstruction of a previous 4×4 block. To minimize this latency, we shuffle the encoding order of 4×4 intra prediction while maintaining the consistency with the standard. To further reduce the processing time, two prediction modes are not used in some blocks. With the proposed method, we can implement the intra prediction block as a pipelined architecture. The processing time can be reduced by maximum 40{\%}, because the latency caused by reconstruction of the previous 4×4 block was hidden. It was implemented into the hardware with some parallel processing architecture. The required cycles were 470 cycles.",
author = "Wonjae Lee and Seongjoo Lee and Jaeseok Kim",
year = "2006",
month = "1",
day = "1",
doi = "10.1109/TENCON.2006.343970",
language = "English",
isbn = "1424405491",
series = "IEEE Region 10 Annual International Conference, Proceedings/TENCON",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2006 IEEE Region 10 Conference, TENCON 2006",
address = "United States",

}

Lee, W, Lee, S & Kim, J 2006, Pipelined intra prediction using shuffled encoding order for H.264/AVC. in 2006 IEEE Region 10 Conference, TENCON 2006., 4142560, IEEE Region 10 Annual International Conference, Proceedings/TENCON, Institute of Electrical and Electronics Engineers Inc., 2006 IEEE Region 10 Conference, TENCON 2006, Hong Kong, China, 06/11/14. https://doi.org/10.1109/TENCON.2006.343970

Pipelined intra prediction using shuffled encoding order for H.264/AVC. / Lee, Wonjae; Lee, Seongjoo; Kim, Jaeseok.

2006 IEEE Region 10 Conference, TENCON 2006. Institute of Electrical and Electronics Engineers Inc., 2006. 4142560 (IEEE Region 10 Annual International Conference, Proceedings/TENCON).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Pipelined intra prediction using shuffled encoding order for H.264/AVC

AU - Lee, Wonjae

AU - Lee, Seongjoo

AU - Kim, Jaeseok

PY - 2006/1/1

Y1 - 2006/1/1

N2 - In this paper, we propose a pipelined intra prediction using shuffled encoding order for H.264/AVC. Due to a dependency problem of 4×4 intra prediction mode, a new 4×4 block cannot be predicted before reconstruction of a previous 4×4 block. To minimize this latency, we shuffle the encoding order of 4×4 intra prediction while maintaining the consistency with the standard. To further reduce the processing time, two prediction modes are not used in some blocks. With the proposed method, we can implement the intra prediction block as a pipelined architecture. The processing time can be reduced by maximum 40%, because the latency caused by reconstruction of the previous 4×4 block was hidden. It was implemented into the hardware with some parallel processing architecture. The required cycles were 470 cycles.

AB - In this paper, we propose a pipelined intra prediction using shuffled encoding order for H.264/AVC. Due to a dependency problem of 4×4 intra prediction mode, a new 4×4 block cannot be predicted before reconstruction of a previous 4×4 block. To minimize this latency, we shuffle the encoding order of 4×4 intra prediction while maintaining the consistency with the standard. To further reduce the processing time, two prediction modes are not used in some blocks. With the proposed method, we can implement the intra prediction block as a pipelined architecture. The processing time can be reduced by maximum 40%, because the latency caused by reconstruction of the previous 4×4 block was hidden. It was implemented into the hardware with some parallel processing architecture. The required cycles were 470 cycles.

UR - http://www.scopus.com/inward/record.url?scp=34547564928&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=34547564928&partnerID=8YFLogxK

U2 - 10.1109/TENCON.2006.343970

DO - 10.1109/TENCON.2006.343970

M3 - Conference contribution

AN - SCOPUS:34547564928

SN - 1424405491

SN - 9781424405497

T3 - IEEE Region 10 Annual International Conference, Proceedings/TENCON

BT - 2006 IEEE Region 10 Conference, TENCON 2006

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

Lee W, Lee S, Kim J. Pipelined intra prediction using shuffled encoding order for H.264/AVC. In 2006 IEEE Region 10 Conference, TENCON 2006. Institute of Electrical and Electronics Engineers Inc. 2006. 4142560. (IEEE Region 10 Annual International Conference, Proceedings/TENCON). https://doi.org/10.1109/TENCON.2006.343970