A new polymeric gate dielectric interlayer of a cross-linkable poly(styrene-random-methylmethacrylate) copolymer is introduced with a good thermal and chemical resistance in bottom gate Ferroelectric Field Effect Transistor (FeFET) memory with pentacene active layer and ferroelectric poly(vinylidene fluoride-co-trifluoroethylene) (PVDF-TrFE) one. A thin uniform PVDF-TrFE film was successfully formed with well defined ferroelectric microdomains on an interlayer. Thickness of the interlayer turns out to be one of the most important factors for controlling gate leakage current which is supposed to be minimized for high ON/OFF bistability of a FeFET memory. An interlayer inserted between gate electrode and PVDF-TrFE layer significantly reduces gate leakage current, leading to source-drain OFF current of approximately 10-11 A in particular when its thickness becomes greater than approximately 25 nm. A reliable FeFET device shows a clockwise I-V hysteresis with drain current bistablility of 103 at ±40 V gate voltage.
Bibliographical noteFunding Information:
This project was supported by The National Research Program for the 0.1 Terabit Non-Volatile Memory Development and “SYSTEM2010” project sponsored by Korea Commerce, Industry and Energy and Samsung Electronics, Co., Ltd. This work was supported by the Second Stage of Brain Korea 21 Project in 2006 and the Korea Science and Engineering Foundation (KOSEF) grant funded by the Korea government (MOST) (No. R11-2007-050-03001-0) DAPA and ADD.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Materials Chemistry
- Electrical and Electronic Engineering