Read-preferred SRAM cell with write-assist circuit using back-gate ETSOI transistors in 22-nm technology

Younghwi Yang, Hanwool Jeong, Frank Yang, Joseph Wang, Geoffrey Yeap, Seong Ook Jung

Research output: Contribution to journalArticle

7 Citations (Scopus)


The degradation of the read stability and write ability of static random-access memory (SRAM) is becoming a critical problem in deep submicrometer technology. To solve this problem, there are many SRAM cell design options such as preferred cells and assist circuits. In addition, extremely thin silicon-on-insulator (ETSOI) with a buried oxide offers an independent back-gate control. In this paper, previously proposed SRAM back-gate-assist circuit schemes are analyzed. From this, we propose a read-preferred SRAM cell with a write-assist circuit using the back-gate ETSOI. The proposed write-assist circuit minimizes the dynamic power overhead and satisfies a sufficient cell sigma in all cells during the read and write operations.

Original languageEnglish
Article number6248688
Pages (from-to)2575-2581
Number of pages7
JournalIEEE Transactions on Electron Devices
Issue number10
Publication statusPublished - 2012 Aug 1


All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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