Reliability-performance tradeoffs between 2.5D and 3D-stacked DRAM processors

Syed Minhaj Hassan, William J. Song, Saibal Mukhopadhyay, Sudhakar Yalamanchili

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Three-dimensional DRAM stacking has emerged as a vehicle for scaling system densities and performance improvement. The two design choices for interfacing to processors are - i) a separate core die connected to the DRAM stack via a silicon interposer (2.5D), and ii) DRAM die stacked on top of the core die (3D). These alternatives have different performance, power, and reliability behaviors. Specifically, 3D designs realize higher performance but operate at higher temperatures and thus exhibit lower lifetime. On the other hand, 2.5D designs provide lower bandwidth between the core die and the DRAM stack, but exhibit significantly longer lifetime due to less thermally-induced degradation. This paper explores this tradeoff between reliability and performance of 3D and 2.5D stacked memory systems. Our results indicate that, in general, lower voltage and frequency operations with 3D stacked systems may achieve balanced reliability-performance tradeoff.

Original languageEnglish
Title of host publication2016 International Reliability Physics Symposium, IRPS 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
PagesMY21-MY25
ISBN (Electronic)9781467391368
DOIs
Publication statusPublished - 2016 Sep 22
Event2016 International Reliability Physics Symposium, IRPS 2016 - Pasadena, United States
Duration: 2016 Apr 172016 Apr 21

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
Volume2016-September
ISSN (Print)1541-7026

Other

Other2016 International Reliability Physics Symposium, IRPS 2016
CountryUnited States
CityPasadena
Period16/4/1716/4/21

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All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Hassan, S. M., Song, W. J., Mukhopadhyay, S., & Yalamanchili, S. (2016). Reliability-performance tradeoffs between 2.5D and 3D-stacked DRAM processors. In 2016 International Reliability Physics Symposium, IRPS 2016 (pp. MY21-MY25). [7574618] (IEEE International Reliability Physics Symposium Proceedings; Vol. 2016-September). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IRPS.2016.7574618