Reliable and Lightweight PUF-based Key Generation using Various Index Voting Architecture

Jeong Hyeon Kim, Ho Jun Jo, Kyung Kuk Jo, Sung Hee Cho, Jae Yong Chung, Joon Sung Yang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Physical Unclonable Functions (PUFs) can be utilized for secret key generation in security applications. Since the inherent randomness of PUF can degrade its reliability, most of the existing PUF architectures have designed post-processing logic to enhance the reliability such as an error correction function for guaranteeing reliability. However, the structures incur high cost in terms of implementation area and power consumption. This paper introduces a Various Index Voting Architecture (VIVA) that can enhance the reliability with a low overhead compared to the conventional schemes. The proposed architecture is based on an index-based scheme with simple computation logic units and iterative operations to generate multiple indices for the accuracy of key generation. Our evaluation results show that the proposed architecture reduces the hardware implementation overhead by 2 to more than 5 times, without losing a key generation failure probability compared to conventional approaches.

Original languageEnglish
Title of host publicationProceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020
EditorsGiorgio Di Natale, Cristiana Bolchini, Elena-Ioana Vatajelu
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages352-357
Number of pages6
ISBN (Electronic)9783981926347
DOIs
Publication statusPublished - 2020 Mar
Event2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 - Grenoble, France
Duration: 2020 Mar 92020 Mar 13

Publication series

NameProceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020

Conference

Conference2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020
Country/TerritoryFrance
CityGrenoble
Period20/3/920/3/13

Bibliographical note

Funding Information:
ACKNOWLEDGMENT This work was supported by Samsung Research Funding Center of Samsung Electronics under Project Number SRFC-TB1803-02.

Publisher Copyright:
© 2020 EDAA.

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Safety, Risk, Reliability and Quality
  • Modelling and Simulation
  • Electrical and Electronic Engineering

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