ReveNAND: A fast-drift-aware resilient 3d NAND flash design

Mustafa M. Shihab, Jie Zhang, Myoungsoo Jung, Mahmut Kandemir

Research output: Contribution to journalArticlepeer-review

3 Citations (Scopus)

Abstract

The paradigm shift from planar (two dimensional (2D)) to vertical (three-dimensional (3D)) models has placed theNANDflash technology on the verge of a design evolution that can handle the demands of next-generation storage applications. However it also introduces challenges that may obstruct the realization of such 3D NAND flash. Specifically we observed that the fast threshold drift (fast-drift) in a charge-trap flash-based 3D NAND cell can make it lose a critical fraction of the stored charge relatively soon after programming and generate errors. In this work we first present an elastic read reference (VRef ) scheme (ERR) for reducing such errors in ReveNAND-our fast-drift aware 3D NAND design. To address the inherent limitation of the adaptive VRef we introduce a new intra-block page organization (hitch-hike) that can enable stronger error correction for the error-prone pages. In addition we propose a novel reinforcement-learning-based smart data refill scheme (iRefill) to counter the impact of fast-drift with minimum performance and hardware overhead. Finally we present the first analytic model to characterize fast-drift and evaluate its system-level impact. Our results show that compared to conventional 3D NAND design our ReveNAND can reduce fast-drift errors by 87% on average and can lower the ECC latency and energy overheads by 13× and 10× respectively.

Original languageEnglish
Article number17
JournalACM Transactions on Architecture and Code Optimization
Volume15
Issue number2
DOIs
Publication statusPublished - 2018 Apr

Bibliographical note

Funding Information:
This work was supported in part by NRF grants 2015M3C4A7065645 and 2016R1C1B2015312, DOE grant DE-AC02-05CH11231, MSIP grant IITP-2017-2017-0-01015, and MemRay grant 2015-11-1731. M. Kandemir’s research was partly supported by NSF grants 1302557, 1213052, 1439021, 1302225, 1629129, 1526750, and 1629915 and a grant from Intel. Authors’ addresses: M. M. Shihab, Department of Electrical and Computer Engineering, University of Texas at Dallas; email: mustafa.shihab@utdallas.edu; J. Zhang and M. Jung (corresponding author), School of Integrated Technology, Yonsei University; emails: {jie, m.jung}@yonsei.ac.kr; M. Kandemir, Department of CSE, Pennsylvania State University; email: kandemir@cse.psu.edu. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from permissions@acm.org. © 2018 ACM 1544-3566/2018/04-ART17 $15.00 https://doi.org/10.1145/3184744

All Science Journal Classification (ASJC) codes

  • Software
  • Information Systems
  • Hardware and Architecture

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