The paradigm shift from planar (two dimensional (2D)) to vertical (three-dimensional (3D)) models has placed theNANDflash technology on the verge of a design evolution that can handle the demands of next-generation storage applications. However it also introduces challenges that may obstruct the realization of such 3D NAND flash. Specifically we observed that the fast threshold drift (fast-drift) in a charge-trap flash-based 3D NAND cell can make it lose a critical fraction of the stored charge relatively soon after programming and generate errors. In this work we first present an elastic read reference (VRef ) scheme (ERR) for reducing such errors in ReveNAND-our fast-drift aware 3D NAND design. To address the inherent limitation of the adaptive VRef we introduce a new intra-block page organization (hitch-hike) that can enable stronger error correction for the error-prone pages. In addition we propose a novel reinforcement-learning-based smart data refill scheme (iRefill) to counter the impact of fast-drift with minimum performance and hardware overhead. Finally we present the first analytic model to characterize fast-drift and evaluate its system-level impact. Our results show that compared to conventional 3D NAND design our ReveNAND can reduce fast-drift errors by 87% on average and can lower the ECC latency and energy overheads by 13× and 10× respectively.
|Journal||ACM Transactions on Architecture and Code Optimization|
|Publication status||Published - 2018 Apr|
All Science Journal Classification (ASJC) codes
- Information Systems
- Hardware and Architecture