Spin-Transfer Torque Magnetoresistive RAM (STT-MRAM) is being intensively explored as a promising on-chip last-level cache (LLC) replacement for SRAM, thanks to its low leakage power and high storage capacity. However, the write penalties imposed by STT-MRAM challenges its incarnation as a successful LLC by deteriorating its performance and energy efficiency. This write performance characteristic unfortunately makes STT-MRAM unable to straightforwardly substitute SRAM in many computing systems. In this paper, we propose a hybrid non-uniform cache architecture (NUCA) by employing STT-MRAM as a read-oriented on-chip storage. The key observation here is that many cache lines in LLC are only touched by read operations without any further write updates. These cache lines, referred to as singular-writes, can be internally migrated from SRAM to STT-MRAM in our hybrid NUCA. Our approach can significantly improve the system performance by avoiding many cache read misses with the larger STT-MRAM cache blocks, while it maintains the cache lines requiring write updates in the SRAM cache. Our evaluation results show that, by utilizing the read-oriented STT-MRAM storage, our hybrid NUCA can better the performance of a conventional SRAM-only NUCA and a dead block aware STT-MRAM NUCA by 30% and 60% with 45% and 8% lower energy values, respectively.
|Publication status||Published - 2016|
|Event||4th Workshop on Interactions of NVM/Flash with Operating Systems and Workloads, INFLOW 2016, co-located with OSDI 2016 - Savannah, United States|
Duration: 2016 Nov 1 → …
|Conference||4th Workshop on Interactions of NVM/Flash with Operating Systems and Workloads, INFLOW 2016, co-located with OSDI 2016|
|Period||16/11/1 → …|
Bibliographical noteFunding Information:
This research is supported in part by MSIP ?ICT Consilience Creative Program? IITP-R0346-16-1008, NRF-2015M3C4A7065645, NRF-2016R1C1B2015312 DOE grant DE-AC02-05CH1123 and MemRay grant (2015-11-1731). M. Jung has an interest in being supported for any type of engineering or costumer sample product on emerging NVM technologies (e.g., PRAM, X-Point, ReRAM, STT-MRAM etc.).
© INFLOW 2016 - 4th Workshop on Interactions of NVM/Flash with Operating Systems and Workloads, co-located with OSDI 2016. All rights reserved.
All Science Journal Classification (ASJC) codes
- Information Systems
- Human-Computer Interaction