For the first time, S-RCAT (Sphere-shaped-Recess-Channel-Array Transistor) technology has been successfully developed in a 2Gb density DRAM with 70nm feature size. It is a modified structure of the RCAT (Recess-Channel-Array Transistor) and shows an excellent scalability of recessed-channel structure to sub-50nm feature size. The S-RCAT demonstrated superior characteristics in DIBL, subthreshold swing (SW), body effect, junction leakage current and data retention time, comparing to the RCAT structure. In this paper, S-RCAT is proved to be the most promising DRAM array transistor suitable for sub-50nm and mobile applications.
|Number of pages||2|
|Journal||Digest of Technical Papers - Symposium on VLSI Technology|
|Publication status||Published - 2005|
|Event||2005 Symposium on VLSI Technology - Kyoto, Japan|
Duration: 2005 Jun 14 → 2005 Jun 14
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering