SARO: A state-Aware reliability optimization technique for high density NAND flash memory

Myungsuk Kim, Myoungsoo Jung, Youngsun Song, Jihong Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Recent advances in flash technologies, such as scaling and multi-leveling schemes, have been successful to make flash denser and secure more storage spaces per die. Unfortunately, these technology advances significantly degrade flash’s reliability due to a smaller cell geometry and a finer-grained cell state control. In this paper, we propose a state-aware reliability optimization technique (SARO), new flash optimization that improves the flash reliability under diverse scaling and multi-leveling schemes. To this end, we first reveal that reliability-related flash errors are highly skewed among flash cell States, which was not captured by prior studies. The proposed SARO exploits then the different per-state error behavior in flash cell States by selecting the most error-prone flash States (for each error type) and by forming narrow threshold voltage distributions (for the selected States only). Furthermore, SARO is applied only when the program time gets shorter because of flash cell aging, thereby keeping the program latency unchanged. Our experimental results with real MLC and TLC flash devices show that SARO can reduce a significant number of flash bit errors, which can in turn reduce the read latency by 40%, on average.

Original languageEnglish
Title of host publicationGLSVLSI 2018 - Proceedings of the 2018 Great Lakes Symposium on VLSI
PublisherAssociation for Computing Machinery
Pages255-260
Number of pages6
ISBN (Electronic)9781450357241
DOIs
Publication statusPublished - 2018 May 30
Event28th Great Lakes Symposium on VLSI, GLSVLSI 2018 - Chicago, United States
Duration: 2018 May 232018 May 25

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Other

Other28th Great Lakes Symposium on VLSI, GLSVLSI 2018
CountryUnited States
CityChicago
Period18/5/2318/5/25

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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  • Cite this

    Kim, M., Jung, M., Song, Y., & Kim, J. (2018). SARO: A state-Aware reliability optimization technique for high density NAND flash memory. In GLSVLSI 2018 - Proceedings of the 2018 Great Lakes Symposium on VLSI (pp. 255-260). (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI). Association for Computing Machinery. https://doi.org/10.1145/3194554.3194591