Selective incorporation of colloidal nanocrystals in nanopatterned SiO 2 layer for nanocrystal memory device

Il Seo, Do Joong Lee, Quanli Hu, Chang Woo Kwon, Kipil Lim, Seung Hyun Lee, Hyun Mi Kim, Yong Sang Kim, Hyun Ho Lee, Du Yeol Ryu, Ki Bum Kim, Tae Sik Yoon

Research output: Contribution to journalArticle

5 Citations (Scopus)

Abstract

CdSe colloidal nanocrystals with a size of ∼5 nm were selectively incorporated in SiO 2 nanopatterns formed by a self-assembled diblock copolymer patterning through a simple dip-coating process. The selective incorporation was achieved by capillary force, which drives the nanocrystals into the patterns during solvent evaporation in dip-coating. The capacitor structures of an Al-gate/atomic layer deposition- Al 2 O 3 (27 nm) /CdSe (5 nm)/patterned SiO 2 (25 nm) /p-Si substrate were fabricated to characterize the charging/discharging behavior for a memory device. The flatband voltage shift was observed by a charge transport between the gate and the nanocrystals. It demonstrates the colloidal nanocrystal application to a memory device through selective incorporation in regularly ordered nanopatterns by a simple dip-coating process.

Original languageEnglish
JournalElectrochemical and Solid-State Letters
Volume13
Issue number3
DOIs
Publication statusPublished - 2010 Jan 28

Fingerprint

Nanocrystals
nanocrystals
coating
Data storage equipment
Coatings
Atomic layer deposition
atomic layer epitaxy
Block copolymers
charging
Charge transfer
copolymers
capacitors
Evaporation
Capacitors
evaporation
shift
Electric potential
electric potential
Substrates

All Science Journal Classification (ASJC) codes

  • Chemical Engineering(all)
  • Materials Science(all)
  • Physical and Theoretical Chemistry
  • Electrochemistry
  • Electrical and Electronic Engineering

Cite this

Seo, Il ; Lee, Do Joong ; Hu, Quanli ; Kwon, Chang Woo ; Lim, Kipil ; Lee, Seung Hyun ; Kim, Hyun Mi ; Kim, Yong Sang ; Lee, Hyun Ho ; Ryu, Du Yeol ; Kim, Ki Bum ; Yoon, Tae Sik. / Selective incorporation of colloidal nanocrystals in nanopatterned SiO 2 layer for nanocrystal memory device In: Electrochemical and Solid-State Letters. 2010 ; Vol. 13, No. 3.
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abstract = "CdSe colloidal nanocrystals with a size of ∼5 nm were selectively incorporated in SiO 2 nanopatterns formed by a self-assembled diblock copolymer patterning through a simple dip-coating process. The selective incorporation was achieved by capillary force, which drives the nanocrystals into the patterns during solvent evaporation in dip-coating. The capacitor structures of an Al-gate/atomic layer deposition- Al 2 O 3 (27 nm) /CdSe (5 nm)/patterned SiO 2 (25 nm) /p-Si substrate were fabricated to characterize the charging/discharging behavior for a memory device. The flatband voltage shift was observed by a charge transport between the gate and the nanocrystals. It demonstrates the colloidal nanocrystal application to a memory device through selective incorporation in regularly ordered nanopatterns by a simple dip-coating process.",
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Selective incorporation of colloidal nanocrystals in nanopatterned SiO 2 layer for nanocrystal memory device . / Seo, Il; Lee, Do Joong; Hu, Quanli; Kwon, Chang Woo; Lim, Kipil; Lee, Seung Hyun; Kim, Hyun Mi; Kim, Yong Sang; Lee, Hyun Ho; Ryu, Du Yeol; Kim, Ki Bum; Yoon, Tae Sik.

In: Electrochemical and Solid-State Letters, Vol. 13, No. 3, 28.01.2010.

Research output: Contribution to journalArticle

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AU - Seo, Il

AU - Lee, Do Joong

AU - Hu, Quanli

AU - Kwon, Chang Woo

AU - Lim, Kipil

AU - Lee, Seung Hyun

AU - Kim, Hyun Mi

AU - Kim, Yong Sang

AU - Lee, Hyun Ho

AU - Ryu, Du Yeol

AU - Kim, Ki Bum

AU - Yoon, Tae Sik

PY - 2010/1/28

Y1 - 2010/1/28

N2 - CdSe colloidal nanocrystals with a size of ∼5 nm were selectively incorporated in SiO 2 nanopatterns formed by a self-assembled diblock copolymer patterning through a simple dip-coating process. The selective incorporation was achieved by capillary force, which drives the nanocrystals into the patterns during solvent evaporation in dip-coating. The capacitor structures of an Al-gate/atomic layer deposition- Al 2 O 3 (27 nm) /CdSe (5 nm)/patterned SiO 2 (25 nm) /p-Si substrate were fabricated to characterize the charging/discharging behavior for a memory device. The flatband voltage shift was observed by a charge transport between the gate and the nanocrystals. It demonstrates the colloidal nanocrystal application to a memory device through selective incorporation in regularly ordered nanopatterns by a simple dip-coating process.

AB - CdSe colloidal nanocrystals with a size of ∼5 nm were selectively incorporated in SiO 2 nanopatterns formed by a self-assembled diblock copolymer patterning through a simple dip-coating process. The selective incorporation was achieved by capillary force, which drives the nanocrystals into the patterns during solvent evaporation in dip-coating. The capacitor structures of an Al-gate/atomic layer deposition- Al 2 O 3 (27 nm) /CdSe (5 nm)/patterned SiO 2 (25 nm) /p-Si substrate were fabricated to characterize the charging/discharging behavior for a memory device. The flatband voltage shift was observed by a charge transport between the gate and the nanocrystals. It demonstrates the colloidal nanocrystal application to a memory device through selective incorporation in regularly ordered nanopatterns by a simple dip-coating process.

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