Self-assembled nanodielectrics and silicon nanomembranes for low voltage, flexible transistors, and logic gates on plastic substrates

Hoon Sik Kim; Sang Min Won; Young Geun Ha; Jong Hyun Ahn; Antonio Facchetti; Tobin J. Marks; John A. Rogers

doi:10.1063/1.3256223

Self-assembled nanodielectrics and silicon nanomembranes for low voltage, flexible transistors, and logic gates on plastic substrates

Hoon Sik Kim, Sang Min Won, Young Geun Ha, Jong Hyun Ahn, Antonio Facchetti, Tobin J. Marks, John A. Rogers

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article

25 Citations (Scopus)

Abstract

This letter reports the fabrication and electrical characterization of mechanically flexible and low operating voltage transistors and logic gates (NOT, NAND, and NOR gates) using printed silicon nanomembranes and self-assembled nanodielectrics on thin plastic substrates. The transistors exhibit effective linear mobilities of ∼680 cm² /V s, on/off ratios > 10⁷, gate leakage current densities <2.8× 10-7 A/ cm², and subthreshold slopes ∼120 mV/decade. The inverters show voltage gains as high as 4.8. Simple digital logic gates (NAND and NOR gates) demonstrate the possible application of this materials combination in digital integrated circuits.

Original language	English
Article number	183504
Journal	Applied Physics Letters
Volume	95
Issue number	18
DOIs	https://doi.org/10.1063/1.3256223
Publication status	Published - 2009 Nov 16

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All Science Journal Classification (ASJC) codes

Physics and Astronomy (miscellaneous)

Cite this

Kim, H. S., Won, S. M., Ha, Y. G., Ahn, J. H., Facchetti, A., Marks, T. J., & Rogers, J. A. (2009). Self-assembled nanodielectrics and silicon nanomembranes for low voltage, flexible transistors, and logic gates on plastic substrates. Applied Physics Letters, 95(18), [183504]. https://doi.org/10.1063/1.3256223

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10.1063/1.3256223