Self-rectifying resistive memory in passive crossbar arrays

Kanghyeok Jeon; Jeeson Kim; Jin Joo Ryu; Seung Jong Yoo; Choongseok Song; Min Kyu Yang; Doo Seok Jeong; Gun Hwan Kim

doi:10.1038/s41467-021-23180-2

Self-rectifying resistive memory in passive crossbar arrays

Kanghyeok Jeon, Jeeson Kim, Jin Joo Ryu, Seung Jong Yoo, Choongseok Song, Min Kyu Yang, Doo Seok Jeong, Gun Hwan Kim

School of System & Semiconductor Engineering

Research output: Contribution to journal › Article › peer-review

Abstract

Conventional computing architectures are poor suited to the unique workload demands of deep learning, which has led to a surge in interest in memory-centric computing. Herein, a trilayer (Hf_0.8Si_0.2O₂/Al₂O₃/Hf_0.5Si_0.5O₂)-based self-rectifying resistive memory cell (SRMC) that exhibits (i) large selectivity (ca. 10⁴), (ii) two-bit operation, (iii) low read power (4 and 0.8 nW for low and high resistance states, respectively), (iv) read latency (<10 μs), (v) excellent non-volatility (data retention >10⁴ s at 85 °C), and (vi) complementary metal-oxide-semiconductor compatibility (maximum supply voltage ≤5 V) is introduced, which outperforms previously reported SRMCs. These characteristics render the SRMC highly suitable for the main memory for memory-centric computing which can improve deep learning acceleration. Furthermore, the low programming power (ca. 18 nW), latency (100 μs), and endurance (>10⁶) highlight the energy-efficiency and highly reliable random-access memory of our SRMC. The feasible operation of individual SRMCs in passive crossbar arrays of different sizes (30 × 30, 160 × 160, and 320 × 320) is attributed to the large asymmetry and nonlinearity in the current-voltage behavior of the proposed SRMC, verifying its potential for application in large-scale and high-density non-volatile memory for memory-centric computing.

Original language	English
Article number	2968
Journal	Nature communications
Volume	12
Issue number	1
DOIs	https://doi.org/10.1038/s41467-021-23180-2
Publication status	Published - 2021 Dec 1

Bibliographical note

Funding Information:
G.H.K. would like to acknowledge a Korea Research Institute of Chemical Technology grant (Grant no. SS2021-20; Development of smart chemical materials for IoT devices). This work was partly supported by a research grant from the National Research Foundation of Korea under Grant no. NRF-2019R1C1C1009810. This research was also supported by the Ministry of Trade, Industry & Energy (grant number 20012002) and Korea Semiconductor Research Consortium program for the development of future semiconductor devices.

Publisher Copyright:
© 2021, The Author(s).

All Science Journal Classification (ASJC) codes

Chemistry(all)
Biochemistry, Genetics and Molecular Biology(all)
General
Physics and Astronomy(all)

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1038/s41467-021-23180-2

Cite this

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title = "Self-rectifying resistive memory in passive crossbar arrays",

abstract = "Conventional computing architectures are poor suited to the unique workload demands of deep learning, which has led to a surge in interest in memory-centric computing. Herein, a trilayer (Hf0.8Si0.2O2/Al2O3/Hf0.5Si0.5O2)-based self-rectifying resistive memory cell (SRMC) that exhibits (i) large selectivity (ca. 104), (ii) two-bit operation, (iii) low read power (4 and 0.8 nW for low and high resistance states, respectively), (iv) read latency (<10 μs), (v) excellent non-volatility (data retention >104 s at 85 °C), and (vi) complementary metal-oxide-semiconductor compatibility (maximum supply voltage ≤5 V) is introduced, which outperforms previously reported SRMCs. These characteristics render the SRMC highly suitable for the main memory for memory-centric computing which can improve deep learning acceleration. Furthermore, the low programming power (ca. 18 nW), latency (100 μs), and endurance (>106) highlight the energy-efficiency and highly reliable random-access memory of our SRMC. The feasible operation of individual SRMCs in passive crossbar arrays of different sizes (30 × 30, 160 × 160, and 320 × 320) is attributed to the large asymmetry and nonlinearity in the current-voltage behavior of the proposed SRMC, verifying its potential for application in large-scale and high-density non-volatile memory for memory-centric computing.",

author = "Kanghyeok Jeon and Jeeson Kim and Ryu, {Jin Joo} and Yoo, {Seung Jong} and Choongseok Song and Yang, {Min Kyu} and Jeong, {Doo Seok} and Kim, {Gun Hwan}",

note = "Funding Information: G.H.K. would like to acknowledge a Korea Research Institute of Chemical Technology grant (Grant no. SS2021-20; Development of smart chemical materials for IoT devices). This work was partly supported by a research grant from the National Research Foundation of Korea under Grant no. NRF-2019R1C1C1009810. This research was also supported by the Ministry of Trade, Industry & Energy (grant number 20012002) and Korea Semiconductor Research Consortium program for the development of future semiconductor devices. Publisher Copyright: {\textcopyright} 2021, The Author(s).",

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AU - Song, Choongseok

AU - Yang, Min Kyu

AU - Jeong, Doo Seok

AU - Kim, Gun Hwan

N1 - Funding Information: G.H.K. would like to acknowledge a Korea Research Institute of Chemical Technology grant (Grant no. SS2021-20; Development of smart chemical materials for IoT devices). This work was partly supported by a research grant from the National Research Foundation of Korea under Grant no. NRF-2019R1C1C1009810. This research was also supported by the Ministry of Trade, Industry & Energy (grant number 20012002) and Korea Semiconductor Research Consortium program for the development of future semiconductor devices. Publisher Copyright: © 2021, The Author(s).

PY - 2021/12/1

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N2 - Conventional computing architectures are poor suited to the unique workload demands of deep learning, which has led to a surge in interest in memory-centric computing. Herein, a trilayer (Hf0.8Si0.2O2/Al2O3/Hf0.5Si0.5O2)-based self-rectifying resistive memory cell (SRMC) that exhibits (i) large selectivity (ca. 104), (ii) two-bit operation, (iii) low read power (4 and 0.8 nW for low and high resistance states, respectively), (iv) read latency (<10 μs), (v) excellent non-volatility (data retention >104 s at 85 °C), and (vi) complementary metal-oxide-semiconductor compatibility (maximum supply voltage ≤5 V) is introduced, which outperforms previously reported SRMCs. These characteristics render the SRMC highly suitable for the main memory for memory-centric computing which can improve deep learning acceleration. Furthermore, the low programming power (ca. 18 nW), latency (100 μs), and endurance (>106) highlight the energy-efficiency and highly reliable random-access memory of our SRMC. The feasible operation of individual SRMCs in passive crossbar arrays of different sizes (30 × 30, 160 × 160, and 320 × 320) is attributed to the large asymmetry and nonlinearity in the current-voltage behavior of the proposed SRMC, verifying its potential for application in large-scale and high-density non-volatile memory for memory-centric computing.

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Self-rectifying resistive memory in passive crossbar arrays

Abstract

Bibliographical note

All Science Journal Classification (ASJC) codes

UN SDGs

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