A new sensitivity controllable pixel structure is proposed for CMOS active-pixel image sensor. The proposed pixel structure has a sensitivity control gate overlaid on the photodiode. The sensitivity of the pixel is controlled by the bias voltage of the control gate that forms a variable accumulation-mode MOS capacitor. The prototype sensor is fabricated with a 0.35-μm CMOS process and consists of 60 × 240 pixels with 5.6- μm pixel pitch. Measurement results show that the sensitivity of the photodiode can be controlled by a factor of 4.
Bibliographical noteFunding Information:
Manuscript received March 23, 2007; revised April 4, 2007. This work was supported in part by the Ministry of Information and Communications, Korea, under the Information Technology Research Center Support Program, and in part by Samsung Electronics Co. Ltd. The review of this letter was arranged by Editor P. Yu.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering