Si-embedded IC package for W-band applications: Interconnection analysis

Hyun Beom Lee, Byung Wook Min, Young Gon Kim, Jong Min Yook, Sosu Kim, Wansik Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)


This paper reports the interconnection design and analysis of the embedded IC package. Instead of real chips, we used a dummy chip made of silicon. Dummy chip is GCPW structure and chip's lower ground is not in the chip back but below 20 μm polymer. The thickness of dummy IC is 100 μm and the depth of the cavity is 110 μm. An organic lamination process fills the gap between the inserted chip and the cavity and forms a flat insulating layer. The interconnection for the two inserted dummy ICs was realized using the patterning process, with a very short length of 400 μm. By forming sufficient via holes, the parasitic resonance caused by the cavity is minimized. As a result, the loss of the interconnection is less than 0.25 dB and return loss is more than 30 dB at all measured frequency.

Original languageEnglish
Title of host publicationProceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
Number of pages3
ISBN (Electronic)9781728135175
Publication statusPublished - 2019 Dec
Event2019 IEEE Asia-Pacific Microwave Conference, APMC 2019 - Singapore, Singapore
Duration: 2019 Dec 102019 Dec 13

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC


Conference2019 IEEE Asia-Pacific Microwave Conference, APMC 2019

Bibliographical note

Funding Information:
ACKNOWLEDGMENT This work was supported by Agency for Defense Development under the contact UC170028FD.

Publisher Copyright:
© 2019 IEEE.

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering


Dive into the research topics of 'Si-embedded IC package for W-band applications: Interconnection analysis'. Together they form a unique fingerprint.

Cite this