Si-embedded IC package for W-band applications: Interconnection analysis

Hyun Beom Lee; Byung Wook Min; Young Gon Kim; Jong Min Yook; Sosu Kim; Wansik Kim

doi:10.1109/APMC46564.2019.9038484

Si-embedded IC package for W-band applications: Interconnection analysis

Hyun Beom Lee, Byung Wook Min, Young Gon Kim, Jong Min Yook, Sosu Kim, Wansik Kim

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

This paper reports the interconnection design and analysis of the embedded IC package. Instead of real chips, we used a dummy chip made of silicon. Dummy chip is GCPW structure and chip's lower ground is not in the chip back but below 20 μm polymer. The thickness of dummy IC is 100 μm and the depth of the cavity is 110 μm. An organic lamination process fills the gap between the inserted chip and the cavity and forms a flat insulating layer. The interconnection for the two inserted dummy ICs was realized using the patterning process, with a very short length of 400 μm. By forming sufficient via holes, the parasitic resonance caused by the cavity is minimized. As a result, the loss of the interconnection is less than 0.25 dB and return loss is more than 30 dB at all measured frequency.

Original language	English
Title of host publication	Proceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1080-1082
Number of pages	3
ISBN (Electronic)	9781728135175
DOIs	https://doi.org/10.1109/APMC46564.2019.9038484
Publication status	Published - 2019 Dec
Event	2019 IEEE Asia-Pacific Microwave Conference, APMC 2019 - Singapore, Singapore Duration: 2019 Dec 10 → 2019 Dec 13

Publication series

Name	Asia-Pacific Microwave Conference Proceedings, APMC
Volume	2019-December

Conference

Conference	2019 IEEE Asia-Pacific Microwave Conference, APMC 2019
Country	Singapore
City	Singapore
Period	19/12/10 → 19/12/13

Bibliographical note

Funding Information:
ACKNOWLEDGMENT This work was supported by Agency for Defense Development under the contact UC170028FD.

Publisher Copyright:
© 2019 IEEE.

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/APMC46564.2019.9038484

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Lee, H. B., Min, B. W., Kim, Y. G., Yook, J. M., Kim, S., & Kim, W. (2019). Si-embedded IC package for W-band applications: Interconnection analysis. In Proceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019 (pp. 1080-1082). [9038484] (Asia-Pacific Microwave Conference Proceedings, APMC; Vol. 2019-December). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APMC46564.2019.9038484

Lee, Hyun Beom ; Min, Byung Wook ; Kim, Young Gon ; Yook, Jong Min ; Kim, Sosu ; Kim, Wansik. / Si-embedded IC package for W-band applications : Interconnection analysis. Proceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 1080-1082 (Asia-Pacific Microwave Conference Proceedings, APMC).

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title = "Si-embedded IC package for W-band applications: Interconnection analysis",

abstract = "This paper reports the interconnection design and analysis of the embedded IC package. Instead of real chips, we used a dummy chip made of silicon. Dummy chip is GCPW structure and chip's lower ground is not in the chip back but below 20 μm polymer. The thickness of dummy IC is 100 μm and the depth of the cavity is 110 μm. An organic lamination process fills the gap between the inserted chip and the cavity and forms a flat insulating layer. The interconnection for the two inserted dummy ICs was realized using the patterning process, with a very short length of 400 μm. By forming sufficient via holes, the parasitic resonance caused by the cavity is minimized. As a result, the loss of the interconnection is less than 0.25 dB and return loss is more than 30 dB at all measured frequency.",

author = "Lee, {Hyun Beom} and Min, {Byung Wook} and Kim, {Young Gon} and Yook, {Jong Min} and Sosu Kim and Wansik Kim",

note = "Funding Information: ACKNOWLEDGMENT This work was supported by Agency for Defense Development under the contact UC170028FD. Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019 ; Conference date: 10-12-2019 Through 13-12-2019",

year = "2019",

month = dec,

doi = "10.1109/APMC46564.2019.9038484",

language = "English",

series = "Asia-Pacific Microwave Conference Proceedings, APMC",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Lee, HB, Min, BW, Kim, YG, Yook, JM, Kim, S & Kim, W 2019, Si-embedded IC package for W-band applications: Interconnection analysis. in Proceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019., 9038484, Asia-Pacific Microwave Conference Proceedings, APMC, vol. 2019-December, Institute of Electrical and Electronics Engineers Inc., pp. 1080-1082, 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019, Singapore, Singapore, 19/12/10. https://doi.org/10.1109/APMC46564.2019.9038484

Si-embedded IC package for W-band applications : Interconnection analysis. / Lee, Hyun Beom; Min, Byung Wook; Kim, Young Gon; Yook, Jong Min; Kim, Sosu; Kim, Wansik.

Proceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 1080-1082 9038484 (Asia-Pacific Microwave Conference Proceedings, APMC; Vol. 2019-December).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - This paper reports the interconnection design and analysis of the embedded IC package. Instead of real chips, we used a dummy chip made of silicon. Dummy chip is GCPW structure and chip's lower ground is not in the chip back but below 20 μm polymer. The thickness of dummy IC is 100 μm and the depth of the cavity is 110 μm. An organic lamination process fills the gap between the inserted chip and the cavity and forms a flat insulating layer. The interconnection for the two inserted dummy ICs was realized using the patterning process, with a very short length of 400 μm. By forming sufficient via holes, the parasitic resonance caused by the cavity is minimized. As a result, the loss of the interconnection is less than 0.25 dB and return loss is more than 30 dB at all measured frequency.

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Lee HB, Min BW, Kim YG, Yook JM, Kim S, Kim W. Si-embedded IC package for W-band applications: Interconnection analysis. In Proceedings of the 2019 IEEE Asia-Pacific Microwave Conference, APMC 2019. Institute of Electrical and Electronics Engineers Inc. 2019. p. 1080-1082. 9038484. (Asia-Pacific Microwave Conference Proceedings, APMC). https://doi.org/10.1109/APMC46564.2019.9038484

Si-embedded IC package for W-band applications: Interconnection analysis

Abstract

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Bibliographical note

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