Speculative parallelization using software multi-threaded transactions

Arun Raman, Hanjun Kim, Thomas R. Mason, Thomas B. Jablin, David I. August

Research output: Contribution to journalArticle

13 Citations (Scopus)

Abstract

With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades. While many scientific programs can be parallelized without speculative techniques, speculative parallelism appears to be the key to continuing this trend for general-purpose applications. Recently-proposed code parallelization techniques, such as those by Bridges et al. and by Thies et al., demonstrate scalable performance on multiple cores by using speculation to divide code into atomic units (transactions) that span multiple threads in order to expose data parallelism. Unfortunately, most software and hardware Thread-Level Speculation (TLS) memory systems and transactional memories are not sufficient because they only support single-threaded atomic units. Multi-threaded Transactions (MTXs) address this problem, but they require expensive hardware support as currently proposed in the literature. This paper proposes a Software MTX (SMTX) system that captures the applicability and performance of hardware MTX, but on existing multicore machines. The SMTX system yields a harmonic mean speedup of 13.36x on native hardware with four 6-core processors (24 cores in total) running speculatively parallelized applications.

Original languageEnglish
Pages (from-to)65-76
Number of pages12
JournalACM SIGPLAN Notices
Volume45
Issue number3
Publication statusPublished - 2010 Mar 1

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Hardware
Data storage equipment
Computer hardware
Computer systems

All Science Journal Classification (ASJC) codes

  • Computer Science(all)

Cite this

Raman, A., Kim, H., Mason, T. R., Jablin, T. B., & August, D. I. (2010). Speculative parallelization using software multi-threaded transactions. ACM SIGPLAN Notices, 45(3), 65-76.
Raman, Arun ; Kim, Hanjun ; Mason, Thomas R. ; Jablin, Thomas B. ; August, David I. / Speculative parallelization using software multi-threaded transactions. In: ACM SIGPLAN Notices. 2010 ; Vol. 45, No. 3. pp. 65-76.
@article{1d0aae9ee9524b248b4d6cd9c0040d40,
title = "Speculative parallelization using software multi-threaded transactions",
abstract = "With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades. While many scientific programs can be parallelized without speculative techniques, speculative parallelism appears to be the key to continuing this trend for general-purpose applications. Recently-proposed code parallelization techniques, such as those by Bridges et al. and by Thies et al., demonstrate scalable performance on multiple cores by using speculation to divide code into atomic units (transactions) that span multiple threads in order to expose data parallelism. Unfortunately, most software and hardware Thread-Level Speculation (TLS) memory systems and transactional memories are not sufficient because they only support single-threaded atomic units. Multi-threaded Transactions (MTXs) address this problem, but they require expensive hardware support as currently proposed in the literature. This paper proposes a Software MTX (SMTX) system that captures the applicability and performance of hardware MTX, but on existing multicore machines. The SMTX system yields a harmonic mean speedup of 13.36x on native hardware with four 6-core processors (24 cores in total) running speculatively parallelized applications.",
author = "Arun Raman and Hanjun Kim and Mason, {Thomas R.} and Jablin, {Thomas B.} and August, {David I.}",
year = "2010",
month = "3",
day = "1",
language = "English",
volume = "45",
pages = "65--76",
journal = "ACM SIGPLAN Notices",
issn = "1523-2867",
publisher = "Association for Computing Machinery (ACM)",
number = "3",

}

Raman, A, Kim, H, Mason, TR, Jablin, TB & August, DI 2010, 'Speculative parallelization using software multi-threaded transactions', ACM SIGPLAN Notices, vol. 45, no. 3, pp. 65-76.

Speculative parallelization using software multi-threaded transactions. / Raman, Arun; Kim, Hanjun; Mason, Thomas R.; Jablin, Thomas B.; August, David I.

In: ACM SIGPLAN Notices, Vol. 45, No. 3, 01.03.2010, p. 65-76.

Research output: Contribution to journalArticle

TY - JOUR

T1 - Speculative parallelization using software multi-threaded transactions

AU - Raman, Arun

AU - Kim, Hanjun

AU - Mason, Thomas R.

AU - Jablin, Thomas B.

AU - August, David I.

PY - 2010/3/1

Y1 - 2010/3/1

N2 - With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades. While many scientific programs can be parallelized without speculative techniques, speculative parallelism appears to be the key to continuing this trend for general-purpose applications. Recently-proposed code parallelization techniques, such as those by Bridges et al. and by Thies et al., demonstrate scalable performance on multiple cores by using speculation to divide code into atomic units (transactions) that span multiple threads in order to expose data parallelism. Unfortunately, most software and hardware Thread-Level Speculation (TLS) memory systems and transactional memories are not sufficient because they only support single-threaded atomic units. Multi-threaded Transactions (MTXs) address this problem, but they require expensive hardware support as currently proposed in the literature. This paper proposes a Software MTX (SMTX) system that captures the applicability and performance of hardware MTX, but on existing multicore machines. The SMTX system yields a harmonic mean speedup of 13.36x on native hardware with four 6-core processors (24 cores in total) running speculatively parallelized applications.

AB - With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades. While many scientific programs can be parallelized without speculative techniques, speculative parallelism appears to be the key to continuing this trend for general-purpose applications. Recently-proposed code parallelization techniques, such as those by Bridges et al. and by Thies et al., demonstrate scalable performance on multiple cores by using speculation to divide code into atomic units (transactions) that span multiple threads in order to expose data parallelism. Unfortunately, most software and hardware Thread-Level Speculation (TLS) memory systems and transactional memories are not sufficient because they only support single-threaded atomic units. Multi-threaded Transactions (MTXs) address this problem, but they require expensive hardware support as currently proposed in the literature. This paper proposes a Software MTX (SMTX) system that captures the applicability and performance of hardware MTX, but on existing multicore machines. The SMTX system yields a harmonic mean speedup of 13.36x on native hardware with four 6-core processors (24 cores in total) running speculatively parallelized applications.

UR - http://www.scopus.com/inward/record.url?scp=77949706477&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77949706477&partnerID=8YFLogxK

M3 - Article

VL - 45

SP - 65

EP - 76

JO - ACM SIGPLAN Notices

JF - ACM SIGPLAN Notices

SN - 1523-2867

IS - 3

ER -

Raman A, Kim H, Mason TR, Jablin TB, August DI. Speculative parallelization using software multi-threaded transactions. ACM SIGPLAN Notices. 2010 Mar 1;45(3):65-76.