Abstract
In this paper, we describe the integrated power, area and thermal modeling framework in the structural simulation toolkit (SST) for large-scale high performance computer simulation. It integrates various power and thermal modeling tools and computes run-time energy dissipation for core, network on chip, memory controller and shared cache. It also provides functionality to update the leakage power as temperature changes. We illustrate the utilization of the framework by applying it to explore interconnect options in manycore systems with consideration of temperature variation and leakage feedback. We compare power, energy-delay-area product (EDAP) and energy-delay product (EDP) of four manycore configurations-1 core, 2 cores, 4 cores and 8 cores per cluster. Results from simulation with or without consideration of temperature variation both show that the 4-core per cluster configuration has the best EDAP and EDP. Even so, considering that temperature variation increases total power dissipation, we demonstrate the importance of considering temperature variation in the design flow. With this power, area and thermal modeling capability, the SST can be used for hardware/software co-design of future exascale systems.
| Original language | English |
|---|---|
| Pages (from-to) | 181-191 |
| Number of pages | 11 |
| Journal | Computer Journal |
| Volume | 55 |
| Issue number | 2 |
| DOIs | |
| Publication status | Published - 2012 Feb 1 |
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All Science Journal Classification (ASJC) codes
- Computer Science(all)
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SST : A scalable parallel framework for architecture-level performance, power, area and thermal simulation. / Hsieh, Ming Yu; Riesen, Rolf; Thompson, Kevin; Song, William; Rodrigues, Arun.
In: Computer Journal, Vol. 55, No. 2, 01.02.2012, p. 181-191.Research output: Contribution to journal › Article
TY - JOUR
T1 - SST
T2 - A scalable parallel framework for architecture-level performance, power, area and thermal simulation
AU - Hsieh, Ming Yu
AU - Riesen, Rolf
AU - Thompson, Kevin
AU - Song, William
AU - Rodrigues, Arun
PY - 2012/2/1
Y1 - 2012/2/1
N2 - In this paper, we describe the integrated power, area and thermal modeling framework in the structural simulation toolkit (SST) for large-scale high performance computer simulation. It integrates various power and thermal modeling tools and computes run-time energy dissipation for core, network on chip, memory controller and shared cache. It also provides functionality to update the leakage power as temperature changes. We illustrate the utilization of the framework by applying it to explore interconnect options in manycore systems with consideration of temperature variation and leakage feedback. We compare power, energy-delay-area product (EDAP) and energy-delay product (EDP) of four manycore configurations-1 core, 2 cores, 4 cores and 8 cores per cluster. Results from simulation with or without consideration of temperature variation both show that the 4-core per cluster configuration has the best EDAP and EDP. Even so, considering that temperature variation increases total power dissipation, we demonstrate the importance of considering temperature variation in the design flow. With this power, area and thermal modeling capability, the SST can be used for hardware/software co-design of future exascale systems.
AB - In this paper, we describe the integrated power, area and thermal modeling framework in the structural simulation toolkit (SST) for large-scale high performance computer simulation. It integrates various power and thermal modeling tools and computes run-time energy dissipation for core, network on chip, memory controller and shared cache. It also provides functionality to update the leakage power as temperature changes. We illustrate the utilization of the framework by applying it to explore interconnect options in manycore systems with consideration of temperature variation and leakage feedback. We compare power, energy-delay-area product (EDAP) and energy-delay product (EDP) of four manycore configurations-1 core, 2 cores, 4 cores and 8 cores per cluster. Results from simulation with or without consideration of temperature variation both show that the 4-core per cluster configuration has the best EDAP and EDP. Even so, considering that temperature variation increases total power dissipation, we demonstrate the importance of considering temperature variation in the design flow. With this power, area and thermal modeling capability, the SST can be used for hardware/software co-design of future exascale systems.
UR - http://www.scopus.com/inward/record.url?scp=84856874372&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84856874372&partnerID=8YFLogxK
U2 - 10.1093/comjnl/bxr069
DO - 10.1093/comjnl/bxr069
M3 - Article
AN - SCOPUS:84856874372
VL - 55
SP - 181
EP - 191
JO - Computer Journal
JF - Computer Journal
SN - 0010-4620
IS - 2
ER -