The control of thermal treatment of Y2O3 barrier layer for its phase formation was revealed to be able to control the interface between Y2O3 barrier and Si substrate. Through annealing at 800 °C for 30 min under O2 ambient, the thinnest interfacial layer containing Y-silicate and SiO2 phases was formed with Nd 2Ti2O7(NTO) film deposited on an unannealed Y2O3/Si system. However, when the crystallization of NTO film is done on the crystalline Y2O3 substrate, a growth direction of 〈100〉 becomes dominant due to the lattice matching relationship between NTO and Y2O3. The crystallinity of Y2O3 barrier was found to control the degree of 〈100〉 preferred orientation of NTO film and a memory window value of NTO/Y2O3/Si system could be controlled, i.e., in case of applying to ferroelectric gate system, the largest memory window of NTO film is possible with the highest degree of 〈100〉 growth orientation. The electrical breakdown was found to initiate at the interfacial layer between the Y2O3 barrier and Si substrate, and a calculated effective electric field for the breakdown was almost uniform even with the change of anneal procedure.
Bibliographical noteFunding Information:
This work was supported by Korea Research Foundation Grant (KRF-2003-041-D00375).
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Surfaces and Interfaces
- Surfaces, Coatings and Films
- Metals and Alloys
- Materials Chemistry