Sub-100 nm regrown S/D Gate-Last In0.7Ga0.3As QW MOSFETs with μn,eff > 5,500 cm2/V-s

C. S. Shin; W. K. Park; Sh Shin; Yd Cho; Dh Ko; T. W. Kim; D. H. Koh; Hm Kwon; R. J.W. Hill; P. Kirsch; W. Maszara; D. H. Kim

doi:10.1109/VLSIT.2014.6894351

Sub-100 nm regrown S/D Gate-Last In_0.7Ga_0.3As QW MOSFETs with μ_n,eff > 5,500 cm²/V-s

C. S. Shin, W. K. Park, Sh Shin, Yd Cho, Dh Ko, T. W. Kim, D. H. Koh, Hm Kwon, R. J.W. Hill, P. Kirsch, W. Maszara, D. H. Kim

Department of Materials Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

7 Citations (Scopus)

Abstract

This paper reports on gate-last (GL) In_0.7Ga_0.3As QW MOSFETs with regrown S/D by MOCVD. Long-channel devices exhibit excellent electrostatics and carrier transport (SS=80mV/dec., DIBL=22mV/V, and μ_n,eff>5,500 cm²/V-s at 300k). Short-channel device with L_g = 40 nm also exhibit excellent electrostatic integrity of SS = 105 mV/dec., and DIBL = 150 mV/V, together with g_m-max = 2 mS/μm at V_DS = 0.5 V. This record performance is achieved by using a low D_it and Al₂O₃/HfO₂ gate stack with EOT ∼ 1-nm, optimized selective S/D regrowth with MOCVD, and GL process.

Original language	English
Title of host publication	Digest of Technical Papers - Symposium on VLSI Technology
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781479933310
DOIs	https://doi.org/10.1109/VLSIT.2014.6894351
Publication status	Published - 2014 Sep 8
Event	34th Symposium on VLSI Technology, VLSIT 2014 - Honolulu, United States Duration: 2014 Jun 9 → 2014 Jun 12

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)	0743-1562

Other

Other	34th Symposium on VLSI Technology, VLSIT 2014
Country	United States
City	Honolulu
Period	14/6/9 → 14/6/12

Bibliographical note

Publisher Copyright:
© 2014 IEEE.

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/VLSIT.2014.6894351

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Shin, C. S., Park, W. K., Shin, S., Cho, Y., Ko, D., Kim, T. W., Koh, D. H., Kwon, H., Hill, R. J. W., Kirsch, P., Maszara, W., & Kim, D. H. (2014). Sub-100 nm regrown S/D Gate-Last In_0.7Ga_0.3As QW MOSFETs with μ_n,eff > 5,500 cm²/V-s. In Digest of Technical Papers - Symposium on VLSI Technology [6894351] (Digest of Technical Papers - Symposium on VLSI Technology). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSIT.2014.6894351

Shin, C. S. ; Park, W. K. ; Shin, Sh ; Cho, Yd ; Ko, Dh ; Kim, T. W. ; Koh, D. H. ; Kwon, Hm ; Hill, R. J.W. ; Kirsch, P. ; Maszara, W. ; Kim, D. H. / Sub-100 nm regrown S/D Gate-Last In_0.7Ga_0.3As QW MOSFETs with μ_n,eff > 5,500 cm²/V-s. Digest of Technical Papers - Symposium on VLSI Technology. Institute of Electrical and Electronics Engineers Inc., 2014. (Digest of Technical Papers - Symposium on VLSI Technology).

@inproceedings{0433de7eae084d11a1f6fb4bbc51d344,

title = "Sub-100 nm regrown S/D Gate-Last In0.7Ga0.3As QW MOSFETs with μn,eff > 5,500 cm2/V-s",

abstract = "This paper reports on gate-last (GL) In0.7Ga0.3As QW MOSFETs with regrown S/D by MOCVD. Long-channel devices exhibit excellent electrostatics and carrier transport (SS=80mV/dec., DIBL=22mV/V, and μn,eff>5,500 cm2/V-s at 300k). Short-channel device with Lg = 40 nm also exhibit excellent electrostatic integrity of SS = 105 mV/dec., and DIBL = 150 mV/V, together with gm-max = 2 mS/μm at VDS = 0.5 V. This record performance is achieved by using a low Dit and Al2O3/HfO2 gate stack with EOT ∼ 1-nm, optimized selective S/D regrowth with MOCVD, and GL process.",

author = "Shin, {C. S.} and Park, {W. K.} and Sh Shin and Yd Cho and Dh Ko and Kim, {T. W.} and Koh, {D. H.} and Hm Kwon and Hill, {R. J.W.} and P. Kirsch and W. Maszara and Kim, {D. H.}",

note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 34th Symposium on VLSI Technology, VLSIT 2014 ; Conference date: 09-06-2014 Through 12-06-2014",

year = "2014",

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doi = "10.1109/VLSIT.2014.6894351",

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Shin, CS, Park, WK, Shin, S, Cho, Y, Ko, D, Kim, TW, Koh, DH, Kwon, H, Hill, RJW, Kirsch, P, Maszara, W & Kim, DH 2014, Sub-100 nm regrown S/D Gate-Last In_0.7Ga_0.3As QW MOSFETs with μ_n,eff > 5,500 cm²/V-s. in Digest of Technical Papers - Symposium on VLSI Technology., 6894351, Digest of Technical Papers - Symposium on VLSI Technology, Institute of Electrical and Electronics Engineers Inc., 34th Symposium on VLSI Technology, VLSIT 2014, Honolulu, United States, 14/6/9. https://doi.org/10.1109/VLSIT.2014.6894351

Sub-100 nm regrown S/D Gate-Last In_0.7Ga_0.3As QW MOSFETs with μ_n,eff > 5,500 cm²/V-s. / Shin, C. S.; Park, W. K.; Shin, Sh; Cho, Yd; Ko, Dh; Kim, T. W.; Koh, D. H.; Kwon, Hm; Hill, R. J.W.; Kirsch, P.; Maszara, W.; Kim, D. H.

Digest of Technical Papers - Symposium on VLSI Technology. Institute of Electrical and Electronics Engineers Inc., 2014. 6894351 (Digest of Technical Papers - Symposium on VLSI Technology).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AU - Shin, C. S.

AU - Park, W. K.

AU - Shin, Sh

AU - Cho, Yd

AU - Ko, Dh

AU - Kim, T. W.

AU - Koh, D. H.

AU - Kwon, Hm

AU - Hill, R. J.W.

AU - Kirsch, P.

AU - Maszara, W.

AU - Kim, D. H.

PY - 2014/9/8

Y1 - 2014/9/8

N2 - This paper reports on gate-last (GL) In0.7Ga0.3As QW MOSFETs with regrown S/D by MOCVD. Long-channel devices exhibit excellent electrostatics and carrier transport (SS=80mV/dec., DIBL=22mV/V, and μn,eff>5,500 cm2/V-s at 300k). Short-channel device with Lg = 40 nm also exhibit excellent electrostatic integrity of SS = 105 mV/dec., and DIBL = 150 mV/V, together with gm-max = 2 mS/μm at VDS = 0.5 V. This record performance is achieved by using a low Dit and Al2O3/HfO2 gate stack with EOT ∼ 1-nm, optimized selective S/D regrowth with MOCVD, and GL process.

AB - This paper reports on gate-last (GL) In0.7Ga0.3As QW MOSFETs with regrown S/D by MOCVD. Long-channel devices exhibit excellent electrostatics and carrier transport (SS=80mV/dec., DIBL=22mV/V, and μn,eff>5,500 cm2/V-s at 300k). Short-channel device with Lg = 40 nm also exhibit excellent electrostatic integrity of SS = 105 mV/dec., and DIBL = 150 mV/V, together with gm-max = 2 mS/μm at VDS = 0.5 V. This record performance is achieved by using a low Dit and Al2O3/HfO2 gate stack with EOT ∼ 1-nm, optimized selective S/D regrowth with MOCVD, and GL process.

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T3 - Digest of Technical Papers - Symposium on VLSI Technology

BT - Digest of Technical Papers - Symposium on VLSI Technology

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 34th Symposium on VLSI Technology, VLSIT 2014

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Shin CS, Park WK, Shin S, Cho Y, Ko D, Kim TW et al. Sub-100 nm regrown S/D Gate-Last In_0.7Ga_0.3As QW MOSFETs with μ_n,eff > 5,500 cm²/V-s. In Digest of Technical Papers - Symposium on VLSI Technology. Institute of Electrical and Electronics Engineers Inc. 2014. 6894351. (Digest of Technical Papers - Symposium on VLSI Technology). https://doi.org/10.1109/VLSIT.2014.6894351