Sub-100 nm regrown S/D Gate-Last In0.7Ga0.3As QW MOSFETs with μn,eff > 5,500 cm2/V-s

C. S. Shin, W. K. Park, Sh Shin, Yd Cho, Dh Ko, T. W. Kim, D. H. Koh, Hm Kwon, R. J.W. Hill, P. Kirsch, W. Maszara, D. H. Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

8 Citations (Scopus)


This paper reports on gate-last (GL) In0.7Ga0.3As QW MOSFETs with regrown S/D by MOCVD. Long-channel devices exhibit excellent electrostatics and carrier transport (SS=80mV/dec., DIBL=22mV/V, and μn,eff>5,500 cm2/V-s at 300k). Short-channel device with Lg = 40 nm also exhibit excellent electrostatic integrity of SS = 105 mV/dec., and DIBL = 150 mV/V, together with gm-max = 2 mS/μm at VDS = 0.5 V. This record performance is achieved by using a low Dit and Al2O3/HfO2 gate stack with EOT ∼ 1-nm, optimized selective S/D regrowth with MOCVD, and GL process.

Original languageEnglish
Title of host publicationDigest of Technical Papers - Symposium on VLSI Technology
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479933310
Publication statusPublished - 2014 Sep 8
Event34th Symposium on VLSI Technology, VLSIT 2014 - Honolulu, United States
Duration: 2014 Jun 92014 Jun 12

Publication series

NameDigest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)0743-1562


Other34th Symposium on VLSI Technology, VLSIT 2014
Country/TerritoryUnited States

Bibliographical note

Publisher Copyright:
© 2014 IEEE.

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering


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