Surface preparation for transistor performance improvement in triple gate oxide integration

Fabrication of current high-performance metal-oxide-semiconductor field effect transistors (MOSFETs) requires a multiple gate oxide integration to obtain different oxide thicknesses and applied voltages. However, channel mobility and drive current are degraded as the number of oxide growth and etching steps increases during the multiple gate oxide integration. In multiple gate oxide integration, a shorter overetch time with a more dilute HF solution for the removal of preexisting oxides exhibits improved surface mobility and transistor drive current resulting from the suppression of surface roughness deterioration. The elimination of SC1 cleaning or the addition of a lower-temperature dilute SC1 cleaning in the pregate cleaning sequence also produces improved transistor mobility. Considering that the addition of SC1 cleaning in the pregate cleaning sequence is needed to remove particles on the surface, the use of a dilute SC1 cleaning may be a realistic method to achieve both improvement of transistor performance and removal of particles. Mobility and drive current of nMOSFETs are found to be more sensitive to surface preparation changes than pMOSFETs, which may be explained by the closer proximity of electrons to the Si/SiO₂ interface compared to holes.