System level EM modeling of digital IC packages and PC boards

Jong Gwan Yook, Tawfik Arabi, Tim Schreyer, Linda P. Katehi, Karem A. Sakallah

Research output: Contribution to conferencePaper

Abstract

For an accurate system level electromagnetic (EM) modeling of digital IC packages and PC boards, a new methodology is developed combining electromagnetic and circuit simulators. The EM modeling of geometrical details in the IC's structures based on a full-wave finite element method provides accurate equivalent circuits which are incorporated in a system level circuit simulator. This circuit simulator results in HSPICE type of RLC circuits which are then analyzed in time domain to compute switching noise on any designate places.

Original languageEnglish
Pages238-240
Number of pages3
Publication statusPublished - 1996 Dec 1
EventProceedings of the 1996 5th Topical Meeting on Electrical Performance of Electronic Packaging - Napa Valley, CA, USA
Duration: 1996 Oct 281996 Oct 30

Other

OtherProceedings of the 1996 5th Topical Meeting on Electrical Performance of Electronic Packaging
CityNapa Valley, CA, USA
Period96/10/2896/10/30

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Networks (circuits)
Simulators
Equivalent circuits
Finite element method

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Yook, J. G., Arabi, T., Schreyer, T., Katehi, L. P., & Sakallah, K. A. (1996). System level EM modeling of digital IC packages and PC boards. 238-240. Paper presented at Proceedings of the 1996 5th Topical Meeting on Electrical Performance of Electronic Packaging, Napa Valley, CA, USA, .
Yook, Jong Gwan ; Arabi, Tawfik ; Schreyer, Tim ; Katehi, Linda P. ; Sakallah, Karem A. / System level EM modeling of digital IC packages and PC boards. Paper presented at Proceedings of the 1996 5th Topical Meeting on Electrical Performance of Electronic Packaging, Napa Valley, CA, USA, .3 p.
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Yook, JG, Arabi, T, Schreyer, T, Katehi, LP & Sakallah, KA 1996, 'System level EM modeling of digital IC packages and PC boards' Paper presented at Proceedings of the 1996 5th Topical Meeting on Electrical Performance of Electronic Packaging, Napa Valley, CA, USA, 96/10/28 - 96/10/30, pp. 238-240.

System level EM modeling of digital IC packages and PC boards. / Yook, Jong Gwan; Arabi, Tawfik; Schreyer, Tim; Katehi, Linda P.; Sakallah, Karem A.

1996. 238-240 Paper presented at Proceedings of the 1996 5th Topical Meeting on Electrical Performance of Electronic Packaging, Napa Valley, CA, USA, .

Research output: Contribution to conferencePaper

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Yook JG, Arabi T, Schreyer T, Katehi LP, Sakallah KA. System level EM modeling of digital IC packages and PC boards. 1996. Paper presented at Proceedings of the 1996 5th Topical Meeting on Electrical Performance of Electronic Packaging, Napa Valley, CA, USA, .