Hotspots and voltage droops have become critical problems during scan test. They are minimized by dynamically varying clock frequency during scan shift operation. We control average and peak temperature by adjusting the clock frequency assigned to each core. This proposed method is applied to multi-core System-on-Chip (SoC). Experimental results show that our method achieves 28% peak temperature reduction and 38% average temperature reduction.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering