Test data reduction method based on berlekamp-massey algorithm

Hyeonchan Lim, Junghwan Kim, Soyeon Kang, Sungho Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Due to innovation of manufacturing technology of integrated circuit (IC), more transistors have been integrated on a single IC, which makes the volume of test data become one of major factors of testing system-on-chips (SoCs). As the large volume of test data is contributed to increased test cost (including test time, tester memory requirement, power consuming), test data reduction and generation method based on berlekamp-massey (BM) algorithm is proposed to reduce the volume of test data. The proposed method reduces test data by exploiting compatibility among scan flip-flops (SFFs) and using LFSRs which are synthesized by BM algorithm. The compatible SFFs are combined into a group and are broadcasted from the same LFSR. The test data which are broadcasted from the LFSR are compressed into seeds which are results of BM algorithm. The proposed method is verified by ISCAS'89 benchmark circuits and the experimental results shows that the compression ratio is up to 10X that implies test application time (TAT) is also reduced.

Original languageEnglish
Title of host publicationProceedings - International SoC Design Conference 2017, ISOCC 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages123-124
Number of pages2
ISBN (Electronic)9781538622858
DOIs
Publication statusPublished - 2018 May 29
Event14th International SoC Design Conference, ISOCC 2017 - Seoul, Korea, Republic of
Duration: 2017 Nov 52017 Nov 8

Publication series

NameProceedings - International SoC Design Conference 2017, ISOCC 2017

Other

Other14th International SoC Design Conference, ISOCC 2017
Country/TerritoryKorea, Republic of
CitySeoul
Period17/11/517/11/8

Bibliographical note

Funding Information:
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government(MSIP) (No. 2015R1A2A1A13001751).

Publisher Copyright:
© 2017 IEEE.

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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