Test resource reused debug scheme to reduce the post-silicon debug cost

Inhyuk Choi, Hyunggoy Oh, Young Woo Lee, Sungho Kang

Research output: Contribution to journalArticle

Abstract

In this paper, a design for debug (DFD) method that reuses test resources is proposed to reduce the debug cost in post-silicon validation. With the proposed method, the trace buffer is shared for embedded cores to capture the signatures of each core concurrently by reusing a test access mechanism. In this case, the depth of the trace buffer allocated to the core is reconfigurable and variable according to debug scheme. The experimental results indicate that the proposed DFD significantly reduces the debug time when the trace buffer is shared by cores in various debug cases.

Original languageEnglish
Article number8359333
Pages (from-to)1835-1839
Number of pages5
JournalIEEE Transactions on Computers
Volume67
Issue number12
DOIs
Publication statusPublished - 2018 Dec 1

Fingerprint

Buffer
Silicon
Trace
Resources
Costs
Reuse
Signature
Experimental Results
Design

All Science Journal Classification (ASJC) codes

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computational Theory and Mathematics

Cite this

Choi, Inhyuk ; Oh, Hyunggoy ; Lee, Young Woo ; Kang, Sungho. / Test resource reused debug scheme to reduce the post-silicon debug cost. In: IEEE Transactions on Computers. 2018 ; Vol. 67, No. 12. pp. 1835-1839.
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Test resource reused debug scheme to reduce the post-silicon debug cost. / Choi, Inhyuk; Oh, Hyunggoy; Lee, Young Woo; Kang, Sungho.

In: IEEE Transactions on Computers, Vol. 67, No. 12, 8359333, 01.12.2018, p. 1835-1839.

Research output: Contribution to journalArticle

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