The Breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor(RCAT) for 88 nm feature size and beyond

J. Y. Kim; C. S. Lee; S. E. Kim; I. B. Chung; Y. M. Choi; B. J. Park; J. W. Lee; D. I. Kim; Y. S. Hwang; D. S. Hwang; H. K. Hwang; J. M. Park; D. H. Kim; N. J. Kang; M. H. Cho; M. Y. Jeong; H. J. Kim; J. N. Han; S. Y. Kim; B. Y. Nam; H. S. Park; S. H. Chung; J. H. Lee; J. S. Park; H. S. Kim; Y. J. Park; Kinam Kim

The Breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor(RCAT) for 88 nm feature size and beyond

J. Y. Kim, C. S. Lee, S. E. Kim, I. B. Chung, Y. M. Choi, B. J. Park, J. W. Lee, D. I. Kim, Y. S. Hwang, D. S. Hwang, H. K. Hwang, J. M. Park, D. H. Kim, N. J. Kang, M. H. Cho, M. Y. Jeong, H. J. Kim, J. N. Han, S. Y. Kim, B. Y. NamH. S. Park, S. H. Chung, J. H. Lee, J. S. Park, H. S. Kim, Y. J. Park, Kinam Kim

Department of Physics

Research output: Contribution to journal › Conference article › peer-review

79 Citations (Scopus)

Abstract

For the first time, 512Mb DRAMs using a Recess-Channel-ArrayTransistor(RCAT) are successfully developed with 88nm feature size, which is The smallest feature size ever reported in DRAM technology with non-planar array transistor. The RCAT with gate length of 75nm and recessed channel depth of 150nm exhibits drastically improved electrical characteristics such as DIBL, BV_DS, junction leakage and cell contact resistance, comparing to a conventional planar array transistor of the same gate length. The most powerful effect using the RCAT in DRAMs is a great improvement of data retention time. In addition, this technology will easily extend to sub-70nm node by simply increasing recessed channel depth and keeping the same doping concentration of the substrate.

Original language	English
Pages (from-to)	11-12
Number of pages	2
Journal	Digest of Technical Papers - Symposium on VLSI Technology
Publication status	Published - 2003
Event	2003 Symposium on VLSI Technology - Kyoto, Japan Duration: 2003 Jun 10 → 2003 Jun 12

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Cite this

Kim, J. Y., Lee, C. S., Kim, S. E., Chung, I. B., Choi, Y. M., Park, B. J., Lee, J. W., Kim, D. I., Hwang, Y. S., Hwang, D. S., Hwang, H. K., Park, J. M., Kim, D. H., Kang, N. J., Cho, M. H., Jeong, M. Y., Kim, H. J., Han, J. N., Kim, S. Y., ... Kim, K. (2003). The Breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor(RCAT) for 88 nm feature size and beyond. Digest of Technical Papers - Symposium on VLSI Technology, 11-12.

Kim, J. Y. ; Lee, C. S. ; Kim, S. E. ; Chung, I. B. ; Choi, Y. M. ; Park, B. J. ; Lee, J. W. ; Kim, D. I. ; Hwang, Y. S. ; Hwang, D. S. ; Hwang, H. K. ; Park, J. M. ; Kim, D. H. ; Kang, N. J. ; Cho, M. H. ; Jeong, M. Y. ; Kim, H. J. ; Han, J. N. ; Kim, S. Y. ; Nam, B. Y. ; Park, H. S. ; Chung, S. H. ; Lee, J. H. ; Park, J. S. ; Kim, H. S. ; Park, Y. J. ; Kim, Kinam. / The Breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor(RCAT) for 88 nm feature size and beyond. In: Digest of Technical Papers - Symposium on VLSI Technology. 2003 ; pp. 11-12.

@article{193a7484046746fbafa5f698fb782f8a,

title = "The Breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor(RCAT) for 88 nm feature size and beyond",

abstract = "For the first time, 512Mb DRAMs using a Recess-Channel-ArrayTransistor(RCAT) are successfully developed with 88nm feature size, which is The smallest feature size ever reported in DRAM technology with non-planar array transistor. The RCAT with gate length of 75nm and recessed channel depth of 150nm exhibits drastically improved electrical characteristics such as DIBL, BVDS, junction leakage and cell contact resistance, comparing to a conventional planar array transistor of the same gate length. The most powerful effect using the RCAT in DRAMs is a great improvement of data retention time. In addition, this technology will easily extend to sub-70nm node by simply increasing recessed channel depth and keeping the same doping concentration of the substrate.",

author = "Kim, {J. Y.} and Lee, {C. S.} and Kim, {S. E.} and Chung, {I. B.} and Choi, {Y. M.} and Park, {B. J.} and Lee, {J. W.} and Kim, {D. I.} and Hwang, {Y. S.} and Hwang, {D. S.} and Hwang, {H. K.} and Park, {J. M.} and Kim, {D. H.} and Kang, {N. J.} and Cho, {M. H.} and Jeong, {M. Y.} and Kim, {H. J.} and Han, {J. N.} and Kim, {S. Y.} and Nam, {B. Y.} and Park, {H. S.} and Chung, {S. H.} and Lee, {J. H.} and Park, {J. S.} and Kim, {H. S.} and Park, {Y. J.} and Kinam Kim",

year = "2003",

language = "English",

pages = "11--12",

journal = "Digest of Technical Papers - Symposium on VLSI Technology",

issn = "0743-1562",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2003 Symposium on VLSI Technology ; Conference date: 10-06-2003 Through 12-06-2003",

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Kim, JY, Lee, CS, Kim, SE, Chung, IB, Choi, YM, Park, BJ, Lee, JW, Kim, DI, Hwang, YS, Hwang, DS, Hwang, HK, Park, JM, Kim, DH, Kang, NJ, Cho, MH, Jeong, MY, Kim, HJ, Han, JN, Kim, SY, Nam, BY, Park, HS, Chung, SH, Lee, JH, Park, JS, Kim, HS, Park, YJ & Kim, K 2003, 'The Breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor(RCAT) for 88 nm feature size and beyond', Digest of Technical Papers - Symposium on VLSI Technology, pp. 11-12.

The Breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor(RCAT) for 88 nm feature size and beyond. / Kim, J. Y.; Lee, C. S.; Kim, S. E.; Chung, I. B.; Choi, Y. M.; Park, B. J.; Lee, J. W.; Kim, D. I.; Hwang, Y. S.; Hwang, D. S.; Hwang, H. K.; Park, J. M.; Kim, D. H.; Kang, N. J.; Cho, M. H.; Jeong, M. Y.; Kim, H. J.; Han, J. N.; Kim, S. Y.; Nam, B. Y.; Park, H. S.; Chung, S. H.; Lee, J. H.; Park, J. S.; Kim, H. S.; Park, Y. J.; Kim, Kinam.

In: Digest of Technical Papers - Symposium on VLSI Technology, 2003, p. 11-12.

Research output: Contribution to journal › Conference article › peer-review

TY - JOUR

T1 - The Breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor(RCAT) for 88 nm feature size and beyond

AU - Kim, J. Y.

AU - Lee, C. S.

AU - Kim, S. E.

AU - Chung, I. B.

AU - Choi, Y. M.

AU - Park, B. J.

AU - Lee, J. W.

AU - Kim, D. I.

AU - Hwang, Y. S.

AU - Hwang, D. S.

AU - Hwang, H. K.

AU - Park, J. M.

AU - Kim, D. H.

AU - Kang, N. J.

AU - Cho, M. H.

AU - Jeong, M. Y.

AU - Kim, H. J.

AU - Han, J. N.

AU - Kim, S. Y.

AU - Nam, B. Y.

AU - Park, H. S.

AU - Chung, S. H.

AU - Lee, J. H.

AU - Park, J. S.

AU - Kim, H. S.

AU - Park, Y. J.

AU - Kim, Kinam

PY - 2003

Y1 - 2003

N2 - For the first time, 512Mb DRAMs using a Recess-Channel-ArrayTransistor(RCAT) are successfully developed with 88nm feature size, which is The smallest feature size ever reported in DRAM technology with non-planar array transistor. The RCAT with gate length of 75nm and recessed channel depth of 150nm exhibits drastically improved electrical characteristics such as DIBL, BVDS, junction leakage and cell contact resistance, comparing to a conventional planar array transistor of the same gate length. The most powerful effect using the RCAT in DRAMs is a great improvement of data retention time. In addition, this technology will easily extend to sub-70nm node by simply increasing recessed channel depth and keeping the same doping concentration of the substrate.

AB - For the first time, 512Mb DRAMs using a Recess-Channel-ArrayTransistor(RCAT) are successfully developed with 88nm feature size, which is The smallest feature size ever reported in DRAM technology with non-planar array transistor. The RCAT with gate length of 75nm and recessed channel depth of 150nm exhibits drastically improved electrical characteristics such as DIBL, BVDS, junction leakage and cell contact resistance, comparing to a conventional planar array transistor of the same gate length. The most powerful effect using the RCAT in DRAMs is a great improvement of data retention time. In addition, this technology will easily extend to sub-70nm node by simply increasing recessed channel depth and keeping the same doping concentration of the substrate.

UR - http://www.scopus.com/inward/record.url?scp=0141649609&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0141649609&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0141649609

SP - 11

EP - 12

JO - Digest of Technical Papers - Symposium on VLSI Technology

JF - Digest of Technical Papers - Symposium on VLSI Technology

SN - 0743-1562

T2 - 2003 Symposium on VLSI Technology

Y2 - 10 June 2003 through 12 June 2003

ER -

The Breakthrough in data retention time of DRAM using Recess-Channel-Array Transistor(RCAT) for 88 nm feature size and beyond

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