@inproceedings{1ef97ccf72734683a0c7bc10f98c7fbf,
title = "The challenges in introducing PMOS dual channel in CMOS processing",
abstract = "The benefit of a SiGe channel in the adjustment of the threshold voltage in PMOS devices is outlined. However, difficulties in the implementation make the full CMOS integration challenging. We examine these difficulties of implementation and the complexities of the processes. The issues are divided into two categories to better understand the complexity: active area related and complementary process related. In particular, the process issues associated with epitaxy, gate etch, silicide and lithography are particularly examined. It is concluded that the issues can be overcome with excellent transistor results.",
author = "Harris, {H. R.} and Prashant Majhi and Paul Kirsch and Prasanna Sivasubramani and Oh, {Jung Woo} and Song, {S. C.}",
year = "2009",
doi = "10.1149/1.3118948",
language = "English",
isbn = "9781566777094",
series = "ECS Transactions",
publisher = "Electrochemical Society Inc.",
number = "1",
pages = "223--231",
booktitle = "ECS Transactions - Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 5",
edition = "1",
note = "International Symposium on Advanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS: New Materials, Processes and Equipment - 215th ECS Meeting ; Conference date: 24-05-2009 Through 29-05-2009",
}