The characteristics and interfacial electronic structures of organic thin film transistor devices with ultrathin (HfO2)x(SiO 2)1-x gate dielectrics

S. W. Cho, J. G. Jeong, S. H. Park, M. H. Cho, K. Jeong, C. N. Whang, Y. Yi

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17 Citations (Scopus)

Abstract

Pentacene-based thin film transistors with ultrathin (6 nm) (HfO 2)x(SiO2)1-x gate dielectric layers (x=0.25 and 0.75) were fabricated for low-voltage operation. The devices with ultrathin (HfO2)x(SiO2)1-x as the gate dielectric layer were operated at a gate voltage lower than -4.0 eV. However, the threshold voltage and drain current have different values depending on the composition of the (Hf O2)x (Si O2)1-x gate dielectric layer. The device with (HfO2)0.75(SiO2)0.25 gate dielectrics, having larger capacitance, shows a higher drain current than that with (HfO2)0.75(SiO2)0.25 gate dielectrics. On the other hand, the device with (HfO2) 0.75(SiO2)0.25 gate dielectrics, which has a larger work function, shows a lower threshold voltage. The in situ ultraviolet photoelectron spectroscopy shows that this is caused by the difference in electronic structures and by changes in band alignment of the interface between the pentacene and dielectric layers.

Original languageEnglish
Article number213302
JournalApplied Physics Letters
Volume92
Issue number21
DOIs
Publication statusPublished - 2008 Jun 6

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transistors
electronic structure
thin films
low voltage
threshold voltage
ultraviolet spectroscopy
high current
capacitance
alignment
photoelectron spectroscopy

All Science Journal Classification (ASJC) codes

  • Physics and Astronomy (miscellaneous)

Cite this

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title = "The characteristics and interfacial electronic structures of organic thin film transistor devices with ultrathin (HfO2)x(SiO 2)1-x gate dielectrics",
abstract = "Pentacene-based thin film transistors with ultrathin (6 nm) (HfO 2)x(SiO2)1-x gate dielectric layers (x=0.25 and 0.75) were fabricated for low-voltage operation. The devices with ultrathin (HfO2)x(SiO2)1-x as the gate dielectric layer were operated at a gate voltage lower than -4.0 eV. However, the threshold voltage and drain current have different values depending on the composition of the (Hf O2)x (Si O2)1-x gate dielectric layer. The device with (HfO2)0.75(SiO2)0.25 gate dielectrics, having larger capacitance, shows a higher drain current than that with (HfO2)0.75(SiO2)0.25 gate dielectrics. On the other hand, the device with (HfO2) 0.75(SiO2)0.25 gate dielectrics, which has a larger work function, shows a lower threshold voltage. The in situ ultraviolet photoelectron spectroscopy shows that this is caused by the difference in electronic structures and by changes in band alignment of the interface between the pentacene and dielectric layers.",
author = "Cho, {S. W.} and Jeong, {J. G.} and Park, {S. H.} and Cho, {M. H.} and K. Jeong and Whang, {C. N.} and Y. Yi",
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AU - Park, S. H.

AU - Cho, M. H.

AU - Jeong, K.

AU - Whang, C. N.

AU - Yi, Y.

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N2 - Pentacene-based thin film transistors with ultrathin (6 nm) (HfO 2)x(SiO2)1-x gate dielectric layers (x=0.25 and 0.75) were fabricated for low-voltage operation. The devices with ultrathin (HfO2)x(SiO2)1-x as the gate dielectric layer were operated at a gate voltage lower than -4.0 eV. However, the threshold voltage and drain current have different values depending on the composition of the (Hf O2)x (Si O2)1-x gate dielectric layer. The device with (HfO2)0.75(SiO2)0.25 gate dielectrics, having larger capacitance, shows a higher drain current than that with (HfO2)0.75(SiO2)0.25 gate dielectrics. On the other hand, the device with (HfO2) 0.75(SiO2)0.25 gate dielectrics, which has a larger work function, shows a lower threshold voltage. The in situ ultraviolet photoelectron spectroscopy shows that this is caused by the difference in electronic structures and by changes in band alignment of the interface between the pentacene and dielectric layers.

AB - Pentacene-based thin film transistors with ultrathin (6 nm) (HfO 2)x(SiO2)1-x gate dielectric layers (x=0.25 and 0.75) were fabricated for low-voltage operation. The devices with ultrathin (HfO2)x(SiO2)1-x as the gate dielectric layer were operated at a gate voltage lower than -4.0 eV. However, the threshold voltage and drain current have different values depending on the composition of the (Hf O2)x (Si O2)1-x gate dielectric layer. The device with (HfO2)0.75(SiO2)0.25 gate dielectrics, having larger capacitance, shows a higher drain current than that with (HfO2)0.75(SiO2)0.25 gate dielectrics. On the other hand, the device with (HfO2) 0.75(SiO2)0.25 gate dielectrics, which has a larger work function, shows a lower threshold voltage. The in situ ultraviolet photoelectron spectroscopy shows that this is caused by the difference in electronic structures and by changes in band alignment of the interface between the pentacene and dielectric layers.

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