The design of the perspective texture mapping for 3D computer graphics in rasterizer merged frame buffer technology

Seung Gi Lee, Woo Chan Park, Won Jong Lee, Woo Nam Jung, Tack Don Han

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Recently, more advanced image quality and many techniques are needed in 3D computer graphics. Especially texture mapping support is the major issue in the design of high performance 3D graphics system. In this paper, a high-performance 3D graphics hardware is designed for texture mapping. The proposed system is composed of a single-chip rasterizer and frame buffer using a processor-memory integration method, which is adapted for processing high-performance 3D graphics. Also, the texture mapping unit is designed using the processor-memory integration technology to provide sufficient bandwidth. Therefore, the tremendous memory bandwidth and the long latency required for texture mapping can be reduced by this approach.

Original languageEnglish
Title of host publicationProceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages219-222
Number of pages4
ISBN (Electronic)0780364708, 9780780364707
DOIs
Publication statusPublished - 2000 Jan 1
Event2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000 - Cheju, Korea, Republic of
Duration: 2000 Aug 282000 Aug 30

Publication series

NameProceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000

Other

Other2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000
CountryKorea, Republic of
CityCheju
Period00/8/2800/8/30

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Lee, S. G., Park, W. C., Lee, W. J., Jung, W. N., & Han, T. D. (2000). The design of the perspective texture mapping for 3D computer graphics in rasterizer merged frame buffer technology. In Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000 (pp. 219-222). [896948] (Proceedings of the 2nd IEEE Asia Pacific Conference on ASICs, AP-ASIC 2000). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APASIC.2000.896948